Register

SELF DOUBT CO

186 views
0 votes
0 votes

https://gateoverflow.in/318/gate2004-47

I AM DOING IT LIKE THAT 

100+TLB HIT (TLB ACCESS TYM+ 2 MEMORY ACCESS)+TLB MISS(PAGE FAULT(PAGE FAULT SERVICE TIME )+PAGE HIT(TLB ACCESS+TWO PAGE TABLE ACCESS +2 MEMORY ACCESS)

100+0.90(0+2*150)+(1-0.90)((1/10000)*8000000+(1-1/10000)*(0+150+150+2*150))

510

SO DOUBT IS THAT WHY THEY NOT INCLUDED PAGE HIT CASE IN THE CASE OF TLB MISS ??

 

User Avatar

Please log in or register to answer this question.

Voting & Accepting an answer helps improve the community
← PreviousNext →
← Previous in categoryNext in category →

Related questions

1 votes
1 votes
1 answer
1
Hirak asked May 23, 2019
596 views
Self Doubt: CO Syllabus
Is pipeline hazards there in the syllabus? And are there any previous year questions from there?
Is pipeline hazards there in the syllabus? And are there any previous year questions from there?
User Avatar
0 votes
0 votes
0 answers
2
iarnav asked Oct 3, 2018
437 views
Self doubt CO
Say the processor runs at 600 MHz then what is CPU clock time?
Say the processor runs at 600 MHz then what is CPU clock time?
User Avatar
1 votes
1 votes
1 answer
3
dragonball asked Jan 1, 2018
4,027 views
Self Doubt: CO & Architecture - Microprogramming
Difference between Horizontal Microprogramming and Vertical Microprogramming Plz explain in detail for GATE point of view only.
Difference between Horizontal Microprogramming and Vertical Microprogramming Plz explain in detail for GATE point of view only.
User Avatar
3 votes
3 votes
1 answer
4
Shubhanshu asked Jul 19, 2017
376 views
Self Doubt In CO
Consider an instruction which has a speed up factor 12 while operating with a 70% efficiency. What could be the number of stages in the pipeline? What will be its answer 17 or 18? And why?
Consider an instruction which has a speed up factor 12 while operating with a 70% efficiency. What could be the number of stages in the pipeline?What will be its answer 1...
User Avatar
Link Copied!