CACHE SELF DOUBT 2

Balaji Jegan asked Sep 10, 2018 • retagged Aug 24, 2022 by Shubham Sharma 2

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CO and Architecture
co-and-architecture
cache-memory
write-through
numerical-answers
self-doubt

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Balaji Jegan asked Sep 10, 2018 • retagged Aug 24, 2022 by Shubham Sharma 2

Balaji Jegan

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eyeamgj

commented Sep 10, 2018

QUESTION DOES NOT EXPLICITLY SAYS ABOUT WRITE HIT SO CONSIDER IT 1 AND IT WILL BE SIMULTANEOUS APPROACh

BUT FOR HIERARCHICAL APPROACH WE NEED WRITE HIT .......???DO WE NEED NOT CONSIDER 75% FOR BOTH READ MISS AND WRITE MISS
THEN IT WILL BE WRITE THROUGH USING HIERARCHICAL ND SIMULTANEOUS APPROACH CANT BE THERE SO AMBIGUOUS QUESTION

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Hemanth_13 asked Nov 7, 2018

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Ram Sharma1 asked May 20, 2015

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64 word cache and Main memory is divided into 16 words block.
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Ram Sharma1 asked May 20, 2015

CO and Architecture
co-and-architecture
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Balaji Jegan asked Sep 10, 2018

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CACHE SELF DOUBT 1

Balaji Jegan

278 views

Balaji Jegan asked Sep 10, 2018

CO and Architecture
co-and-architecture
cache-memory
numerical-answers
write-back
self-doubt

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9 votes

2 answers

Sunil8860 asked Aug 6, 2017

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wrie through updation in cache
Consider a system with cache access time 20 ns and main memory access time 140 ns. If 60% operations are read operations and hit ratio is 90%. What is the effective access time if write through updation technique is used? (a) 75.2 ns (b) 76.4 ns (c) 83.2 ns (d) 84.4 ns

Consider a system with cache access time 20 ns and main memory access time 140 ns. If 60% operations are read operations and hit ratio is 90%. What is the effective acces...

Sunil8860

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Sunil8860 asked Aug 6, 2017

CO and Architecture
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cache-memory
write-through

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