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The instruction pipeline of RISC processor has 200 instructions in which 100 are performing addition, 25 performing division and 75 are performing multiplications, where Excution state for addition take 1 clock cycle, multiplication take 3 clock cycles and division take 5 clock cycles. Assume pipeline has 5 stages IF, ID, EX, MA and WB and their is no data and control hazard. The number of clock cycles required for execution of sequence of instructions are ________.

Ans. 454

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Ok let me explain...

Here, we go by sequence...

  1. Now let's take 100 instructions, if you have drawn pipeline, then you know, very first instruction take all cycles then all consecutive instruction will be completed in every clock cycle so total cycles required by 100 instruction is =

                                           99*1 + 5(no. of pipeline stages)= 104
     
  2. Now then take division instructions which are total 25, now as in above point, consecutive instruction will be completed in every clock cycle from now onwards but this instructions take 5 more cycles so

                                          25*5=125
     
  3. Then take 75 multiplication instructions which take 3 more cycles, so

                                           75*3= 225

So total cycles needed is= 104+125+225 = 454

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Case 1: Number of the clock Cycle 200 instruction In Normal case

     =  5*1 + 199 * 1 (CPI = 1).

   =  5 + 199 = 204.

Case 2 : For Execution Phase

100 instruction takes 1 cycles i.e. these instructions suffering from 0 stall cycle,
25 instruction takes 3 cycles i.e. these instructions suffering from 2 stall cycle,
75 instruction takes 5 cycles i.e. these instructions suffering from 4 stall cycle,

So, extra cycle would be = 100*0 + 25*2+ 75*4 = 350 Cycles.

 

Total cycles =  204 + 350 = 554 Cycles.

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Addition =100 and 1 clock

Division=25 and 5 clock

Multiplication=75 and 3 clock

 

Total time = 100×1+ 25×5 + 75×3 + 2+2=100+125+225+4=554

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Total time= 2+ 3×1 + 3×3 + 1×5 + 2

                =2+3+9+5+2

                =21

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