Madeeasy test series

Question

Suppose that a cache is 20 times faster than main memory and cache memory can be used 80% of the time. The speed up factor that can be achieved by using the cache is

Answer 1

Let Cache access time is X, then main memory access time will be 20X .

Speed up factor = (Time taken to get data W/O Cache)/(Time taken to get data with Cache)

Time taken to get data W/O Cache: 20X

Time taken to get data with Cache: .8X + .2(20X) =4.8X

Then speed up will be 20X/(4.8X) = 4.166 (Answer)

Comments

Time taken to get data with cache : .8X+.2(20X+X) = 5X.

Isn't this so?

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No, As nothing is given regarding the  type of access we should go with simultaneous access.

Answer 2

S_{overall =} ((1-∑f) + ∑$\frac{f}{s}$)^-1 
 
           = ((1-.8) + ( $\frac{.8}{20}$) ^-1

           = 4.166

Answer 3

Hierarchical access to main memory..
T​c : Cache Access Time, T​m : Memory Access time, Tm = 20T​c, Hit Ratio = 0.80

Effective access Time = Tc + 0.20 *Tm = Tc + 0.20*20Tc = 5*Tc
Speed Up = Memory Access Time Without Cache / Memory Access Time With Cache
= Tm/Effective Access time = 20*Tc/5*Tc

Speed up = 4

Comments

@Arjun sir and @Shaik Masthan sir 

what about the miss penalty of L2 cache

pls chk this

in case of parallel/simultaneous = $ h_1t_1 + (1-h_1)( \color{green}{h_2}.t_2 + (1-h_2)\color{red}{t_m})$

in case of sequential/hierarchial​​​​​​= $ t_1 + (1-h_1)( t_2 + (1-h_2)\color{red}{t_m})$

in both the cases is it tm??

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@Shaik Masthan brother I m not getting ur third equation..What is it really meant for?

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thats just the reduced expression of equation 2 @himgta