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Delayed branching can help in the handling of control hazards

For all delayed conditional branch instructions, irrespective of whether the condition evaluates to true or false,

  1. The instruction following the conditional branch instruction in memory is executed

  2. The first instruction in the fall through path is executed

  3. The first instruction in the taken path is executed

  4. The branch takes longer to execute than any other instruction

in CO and Architecture by Veteran (52.1k points)
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+1

Suppose I4 occupy the delay slot isn't it going to change the behaviour of program, when R1 is equal to 0 then branch will be taken and  Store instruction (I4) will be skipped.

sequencing of program after I4 occupy delay slot will be.

I1,

I2,

I3,

BRANCH to Label if R1 == 0

I4

0
That is the DELAYED BRANCH is all about. Even if the condition evaluates TRUE and branch is taken (I4) will still be evaluated because the instruction is already FETCHED in the pipeline and being a wanted instruction IT IS NOT FLUSHED OUT of pipeline unlike other instructions which are not used as delayed branch slot.

Ask if you still have doubt.
0
some more expln. ?
+2

Link for second part of this question is --> https://gateoverflow.in/43487/gate2008-77

3 Answers

+49 votes
Best answer

76. Answer is A. In order to avoid the pipeline delay due to conditional branch instruction, a suitable instruction is placed below the conditional branch instruction such that the instruction will be executed irrespective of whether branch is taken or not and won't affect the program behaviour. 

77. Answer is D) I4. The STORE instruction can be moved below the conditional branch instruction. Whether the branch is taken or not, STORE will be executed as the next instruction after conditional branch instruction, due to delayed branching.

Here, I3 is not the answer because the branch conditional variable R1 is dependent on it. Same for I1. Similarly, I4 has a dependency on I2 and hence I2 must be executed before I4. 

by Veteran (423k points)
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0
sir , i am not getting the meaning of " one branch delay slot" plz help..
+9

Usually after a branch instruction nothing can be put in a pipeline as branch can be either "yes" or "no" and correspondingly the next instruction can change. So, branch delay slot is a technique where we put an instruction which have no dependence on the branch condition to be executed just after the branch instruction. In this way "pipeline" would be used more efficiently.

Currently architectures use branch prediction where either "yes" or "no" is predicted by hardware mechanism and correspondingly instructions are pipelined. If prediction goes wrong, the pipeline is flushed and whole thing re-executed.  

+2
Sir,

Please explain option B and C in question 76. I want to know what is the meaning or difference between 'fall through path' and 'taken path'.

This diagram http://cellperformance.beyond3d.com/articles/2006/04/background-on-branching.html depicts the two path created by branch instruction.
+7
On a conditional jump, the path on condition success path is the taken path and the condition failed path (not a jump) is the fall through path.
0
@Arjun sir  could u plz tell me why i2 wont be the answer .because it is also independent instruction.Any independent instruction which is not affected by branch is put in that place. right? assume the qstn says 2 branch delay slot is there. what will be the ans then?  i2 &i4 ?
+1
I2 is not... I2 is dependent on I4.... I2 is writing value of R4,which is used by I4
0
What is the meaning of option a in ques 76?
+1
@Pyuri So, I4 is dependent on I2.

@Khush Even though that instruction is below a branch instruction, it will be executed (completely) unlike a normal case where only when the branch target is known further instructions are executed.
0
Sir, meaning of fall through path written in the link provided by ram sharma1 is different frm ur explanation.

Which one is true??
0
what is different?
0
But u said condition failed path is fall through path...and as shown in pic (in if part) when condition is true fall through path address. 
Fall through path is if branch is failed the ins. Address processor takes is fall through path address.right??
 
+1
well, see the change in condition on the right side. The condition is complemented there- this is needed to avoid one more JMP instruction. I was referring to condition in assembly code (right side one).
0
I couldn't understand the right side of tht protion.

I dnt evn knw wht beq n cr0 is.
+2
in if we were doing != condition.

In assembly it became beq- branch on equal. So, NOT EQUAL became EQUAL here with a JUMP. The semantics of the code remains the same though the condition is reversed.
0
@Arjun, could you plz explain the difference between option(1) and option(2) ?
0
@arjun sir could you plz explain why option(b) is nt true ?
can we place instructions executed by true condition just after conditional branch instruction that is in taken path just  after conditional branch instruction.
+3
I am not able to get any of the options. What i have read id that we exacute an instruction that would be anyways executed, independent of the branch condition .For eg in quest no. 77) , I4 would be anyways expected , so this is the instruction we execute after branch (not in order) to avoid branch penalty.

as for this question,
a) if we execute instruction following conditional branch, it would be same a snormal flow of thw program and may case branch penalty if branch condition evaluates to false

b) as per the suggested article, i ma not able to understand the concept of fall through path. in first case it says condition on evaluation of if as true as fall through  and its different for the other one.

c)  first instruction in taken path is same as option a)
 
d) its wrong because branching will take same time to execute

please help me clear the concept.
0
@aayushi plzz see my ans i think it ll definetly helps u and after that if u have any doubt then  can tell me.
+8

fall through path depend on instruction.If condition is false it is in fall through path
But here question said, irrespective of condition is true or false
that is why A) is answer

See, it is called delayed conditional branch because it first execute instruction after the following that delayed branch and then condition is evaluated.Condition is evaluated lately, that is why it is called delayed branching

+2

Example to Understand what is fall through path:-

Branch instructions divide the execution path in two paths, the target path and the fall-through path. The address of the first instruction on each path is referred to as target address and fall-through address

Here 102 is fall through address and 500 is target address(target address is the address we want to branch).

If the condition evaluates to true then we go to target address i.e 500 otherwise we go to fall through address

   101       JZ 500

   102       Next Instruction

        .

        .

        .

 500     HLT

0
@arjun sir according to you -branch delay slot is a technique where we put an instruction which have no dependence on the branch condition to be executed just after the branch instruction.

so why I2 cannot be the ans as it is not dependent on the branch condition???

Plz clear my doubt.
0
que. 76.  but even if condition is true or false the next instruction after the condition will definitely going to be executed if iam right?? the first instruction of fall through path will execute??
+10 votes



reference pattrerson book "the hardware software interface" 3rd edition page no 382 

by Boss (12.3k points)
+1 vote
Correct ans for qus no 77 is b only ...becoz we can rearrange I2 nd I3 ...nd after rearranging the instructions I2 is getting one delay slot ... means I2 is delayed by one slot becoz of rearrangement..hence option b is correct
by (29 points)

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