search
Log In

Recent questions tagged microprocessors

0 votes
1 answer
1
In $8085$ microprocessor, the digit $5$ indicates that the microprocessor needs $-5$ volts, $+5$ volts supply $+5$ volts supply only $-5$ volts supply only $5$ MHz clock
asked Mar 24 in CO and Architecture jothee 96 views
0 votes
1 answer
2
In $8085$, which of the following performs: load register pair immediate operation? LDAX rp LKLD addr LXI rp, data INX rp
asked Mar 24 in CO and Architecture jothee 82 views
0 votes
1 answer
3
The contents of Register $(BL)$ and Register $(AL)$ of $8085$ microprocessor are $49H$ and $3AH$ respectively. The contents of $AL$, the status of carry flag $(CF)$ and sign flag $(SF)$ after executing $'SUB AL, BL'$ assembly language instruction, are $AL=0FH; \: CF=1; \: SF= 1$ $AL = F0H; \: CF = 0; \: SF = 0$ $AL =F1H; \: CF = 1; \: SF= 1$ $AL =1FH; \: CF=1; \:SF=1$
asked Mar 24 in CO and Architecture jothee 221 views
0 votes
0 answers
4
In a microprocessor, size of register is generally: Lesser than the size of the data it operates on Greater than the size of the data it operates on Equal to the size of the data it operates on
asked May 29, 2019 in CO and Architecture manikgupta123 315 views
0 votes
1 answer
5
Which part in 8086 microprocessor is responsible for fetching instructions into the queue? BIU EU Stack Registers
asked Apr 29, 2019 in CO and Architecture manikgupta123 251 views
0 votes
0 answers
6
Which of the following set of instructions moves the contents of memory location 3500H to register C? The contents of memory location 3500 H is 46 H. a. LXI H, 3500 H MOV M, C b. LXI C, 3500 H MOV C, M c. LXI C, 46 H MOV C, M d. LXI H, 3500 H MOV C, M
asked Oct 15, 2018 in Digital Logic Abikkkaaa 271 views
1 vote
1 answer
7
Suppose initially the accumulator content is 95 H and carry flag is 0. What will be the contents of accumulator and carry flag after the execution of the instruction RAR? (H stands for hexadecimal representation) a. A = 4A H, Carry flag = 1 b. A = CA H, Carry flag = 0 c. A = CA H, Carry flag = 1 d. A = 2A H, Carry flag = 1
asked Oct 15, 2018 in Digital Logic Abikkkaaa 301 views
1 vote
0 answers
8
How many bytes does the following set of instructions occupy? MVI A, 35H MVI B, 23H ADD B a. Four bytes b. Six bytes c. Three bytes d. Five bytes
asked Oct 15, 2018 in Digital Logic Abikkkaaa 583 views
0 votes
1 answer
9
How many times will the following loop be executed? XRA A MVI C, 05H LOOP: DCR C JNZ LOOP a. Once b. Five times c. Infinite times d. Depends on the initial value of A
asked Oct 15, 2018 in Digital Logic Abikkkaaa 475 views
0 votes
1 answer
10
What are the status of the ZERO flag and the contents of the accumulator after the execution of the following 8085 assembly code? Assume that contents of all other registers and memory locations are unknown. MOV A, 65H MOV B, 32H CMP B a. 0, 00H b. 0, 65H c. 1, 00H d. 1, 65H
asked Oct 15, 2018 in Digital Logic Abikkkaaa 337 views
0 votes
1 answer
11
Which of the following flags is not affected by a conditional branch statement in an 8085 microprocessor? a. Auxiliary Carry flag b. Sign flag c. Carry flag d. Zero flag
asked Oct 15, 2018 in Digital Logic Abikkkaaa 849 views
0 votes
0 answers
12
In 8085 addition which of the following flags are set when the addition of the MSBs is more than 10?
asked Oct 15, 2018 in Digital Logic Abikkkaaa 237 views
0 votes
0 answers
13
How an RRC instruction in 8085 microprocessor instruction set will affect
asked Oct 15, 2018 in Digital Logic Abikkkaaa 177 views
0 votes
0 answers
14
After the execution of the instruction XRA A the contents of A , carry and zero flags
asked Oct 15, 2018 in Digital Logic Abikkkaaa 514 views
0 votes
1 answer
15
In 8085 microprocessor, what is the output of following program? LDA 8000H MVI B, 30H ADD B STA 800 H Read a number from input port and store it in memory Read a number from input device with address 8000H and store it in memory location 8001H Read a ... store it in memory location 8001H Load A with data from input device with address 8000H and display it on the output device with address 8001H
asked Jul 13, 2018 in CO and Architecture Pooja Khatri 306 views
0 votes
2 answers
16
A micro-instruction format has micro-ops field which is divided into three subfields F1, F2, F3 each having seven distinct micro operations, condition field CD for four status bits, branch field BR having four options used in conjunction with address field ADF. The address space is of 128 memory locations. The size of micro-instruction is : (1) 17 bits (2) 20 bits (3) 24 bits (4) 32 bits
asked Jun 29, 2018 in Others Roma_nagpal 803 views
2 votes
0 answers
17
1 vote
1 answer
18
Which of the following is correct statement? In memory - mapped I/O, the CPU can manipulate I/O data residing in interface registers that are not used to manipulate memory words. The isolated I/O method isolates memory and I/O addresses so that memory ... serial transfer of data the two units share a common clock. In synchronous serial transmission of data the two units have different clocks.
asked Nov 5, 2017 in CO and Architecture Arjun 655 views
2 votes
0 answers
19
A micro-instruction format has micro-ops field which is divided into three subfields $F1$, $F2$, $F3$ each having seven distinct micro-operations, conditions field $CD$ for four status bits, branch field $BR$ having four options used in conjunction with address field $ADF$. The address space is of $128$ memory locations. The size of micro-instruction is $17$ bits $20$ bits $24$ bits $32$ bits
asked Nov 5, 2017 in CO and Architecture Arjun 727 views
2 votes
1 answer
20
In $8085$ microprocessor which of the following flag(s) is (are) affected by an arithmetic operation? AC flag only CY flag Only Z flag Only AC, CY, Z flags
asked Nov 5, 2017 in CO and Architecture Arjun 371 views
1 vote
1 answer
21
In $8085$ microprocessor the address bus is of ___________ bits. $4$ $8$ $16$ $32$
asked Nov 5, 2017 in CO and Architecture Arjun 1.5k views
1 vote
2 answers
22
In the architecture of $8085$ ... a-iv b-i c-ii a-iii b-iv c-ii a-ii b-iii c-i a-i b-ii c-iv
asked Nov 5, 2017 in CO and Architecture Arjun 747 views
1 vote
0 answers
23
An 8212 in handshake mode of implementation is used in a device controller of a microprocessor-based system. The 8212 control signals used for the purpose of handshaking are _________ at the microprocessor end, and ________ at the device end.
asked Dec 10, 2016 in Others jothee 112 views
0 votes
0 answers
24
If a crystal of 4MHz frequency has been connected to an 8085, the instruction-fetch duration of a 10-states instruction is ______
asked Dec 10, 2016 in Others jothee 192 views
2 votes
1 answer
25
If the total number of states in the fetching and execution phases of an 8085 instruction is know to be 7, number of states in these machine cycles is divided as ________
asked Dec 10, 2016 in Others jothee 262 views
1 vote
1 answer
26
Consider the following instructions of an 8085 microprocessor MVI D, 6 EH MVI E, 5 DH MOV A, D ADD E If above sequence of instructions are executed, then the value of carry flag (CY) and auxiliary carry (AC) flag respectively will be CY = 0, AC = 0 CY = 0, AC = 1 CY = 1, AC = 1 CY = 1, AC = 0
asked Nov 26, 2016 in CO and Architecture Hradesh patel 607 views
0 votes
1 answer
27
1 vote
1 answer
28
Which of the following in 8085 microprocessor performs $HL = HL + HL$ ? DAD D DAD H DAD B DAD SP
asked Sep 30, 2016 in CO and Architecture makhdoom ghaya 308 views
1 vote
1 answer
29
0 votes
1 answer
30
In which way(s) a macroprocessor for assembly language can be implemented? Independent two-pass processor Independent one-pass processor Expand macrocalls and substitute arguments All of the above
asked Aug 30, 2016 in Others makhdoom ghaya 445 views
...