0 votes 0 votes CO and Architecture co-and-architecture + – kallu singh asked Dec 24, 2018 • retagged Jul 25, 2022 by Shubham Sharma 2 kallu singh 337 views answer comment Share Follow See all 4 Comments See all 4 4 Comments reply Shaik Masthan commented Dec 24, 2018 reply Follow Share type the question instead of screenshot 1 votes 1 votes himgta commented Dec 24, 2018 reply Follow Share @Shaik Masthan brother is this in syllabus? https://gatecse.in/gate-cse-2016-syllabus/#Computer_Organization_and_Architecture here it is mentioned that question regarding RAM should not be there but there has been a question asked in GATE 2018 @Arjun sir please confirm! 0 votes 0 votes Shaik Masthan commented Dec 24, 2018 reply Follow Share i don't know about syllabus 0 votes 0 votes himgta commented Dec 25, 2018 reply Follow Share @Shaik Masthan can u plz explain the solution? 0 votes 0 votes Please log in or register to add a comment.
0 votes 0 votes 2¹²*20*/10³ micro seconds Here we don't need to calculate the no of chips used as all the chips will be refreshed in parallel. We will calculate only for 1 chip i.e no of rows * 1 refresh operation time PRAKHAR singh answered Dec 25, 2018 PRAKHAR singh comment Share Follow See all 0 reply Please log in or register to add a comment.
