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Consider a Computer system with a single core CPU, a single level of cache of size $4 \text{MB}$, and main memory. It takes one CPU cycle to access a memory byte if it is in cache, and $145$ cycles if the memory access incurs a cache miss and must be fetched from main memory. The size of the cache line is $64$ bytes. Consider two arrays $A$ and $B$, each of $N=2^{20}$ integers (assume that an integer requires $4$ bytes of storage). The arrays are stored contiguously in memory, and are aligned at cache line boundaries. The below code shows an access pattern of the arrays $A$ and $B$. Calculate the average time (in CPU cycles) required to access a single element of array $A$ (averaged overall accesses to $A$). Assume that the cache is empty at the start of every scenario, and no other process is using the cache and the cache does not use any optimizations like prefetching.
A direct mapped cache, and every element of $A$ and $B$ is read in sequence as follows:

for (i=0;i<N;i++)
{
    read A[i];
    read B{i];
}

 

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4 Comments

@satendra-No.The question clearly has provided you total time on cache miss and cache hit.You don't need to further think about it.

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@Ayush Upadhyaya had it been given that the 145 cycles is the penalty to load a block from main memory and access the required byte ,then it would have been 146.Am i correct?

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@chauhansunil20th It's a direct mapped cache and size of the cache is 4MB so if 1st element of A goes to block0 then 1st element of B will also go to the block0 because they are 4MB apart.(2^20 * 4  = 4MB) 

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