40 40 votes A processor has $40$ distinct instruction and $24$ general purpose registers. A $32$-bit instruction word has an opcode, two registers operands and an immediate operand. The number of bits available for the immediate operand field is_______. CO & Architecture gatecse-2016-set2 machine-instruction co-and-architecture easy numerical-answers + – Akash Kanase 19.1k views answer comment Share Follow Print See all 4 Comments 4 4 Comments reply viv696 commented Feb 12, 2016 i edited by viv696 Feb 12, 2016 reply Follow flag 16 bits .! 1 1 replyShare js__ commented Nov 5, 2025 reply Follow flag 6 | 5 | 5 | n = 32n = 16 0 0 replyShare Mayank_Pant commented Jun 12 reply Follow flag 16bits 0 0 replyShare legend_of_cse commented Aug 31 reply Follow flag Similar Question : https://gateoverflow.in/460053/gate-cse-2025-set-1-question-27 0 0 replyShare Please log in or register to add a comment.
Best answer 63 63 votes Instruction Opcode Size $= \log_2 40 = 6$ Register operand size $= \log_224 =5$ Total bits available $= 32$ Bits required for opcode $+$ two register operands $= 6 + 2 \times 5 = 16$ Bits available for immediate operand $= 32 - 16 = 16.$ Akash Kanase answered Feb 12, 2016 • edited Nov 24, 2017 by Manu Thakur Akash Kanase comment Share Follow See all 6 Comments 6 6 Comments reply Karthik Akula commented Nov 17, 2016 reply Follow flag |--------------------------------------- 32-bits -----------------------------------------------------------------| opcode(6) R1(5) R2(5) immediate operand =? 6+5+5+x=32 bits x=16 bits 17 17 replyShare chirantan Gupta commented Dec 25, 2017 reply Follow flag Fantastic answer. That solves GATE 2016 set 2 questions .thankyou. 0 0 replyShare rajinder singh commented Oct 31, 2018 reply Follow flag Opcode tell no of distinct operation are their e.g add,sub etc .so why we using log40 as opcode 40 are the distinct instruction. 0 0 replyShare akash.dinkar12 commented Oct 31, 2018 i reshown by akash.dinkar12 Nov 1, 2018 reply Follow flag rajinder singh There are 40 opcodes, it means, there will be 40 distinct operations like ADD, SUB, MUL etc...So in order to represent one operation, we need some bits right!!! If we have 4 distinct operations like ADD, MUL, DIV, SUB, we have to represent each operation with some bits, here we need two bits. 00-ADD 01-MUL 10-DIV 11-SUB So we need log24 = 2 bits Similarly, in this question, we have 40 distinct opcodes, so in order to name them in binary we need log240 = 6 bits 2 2 replyShare rajinder singh commented Oct 31, 2018 reply Follow flag But ln question they given 40 distinct instruction not 40 distinct operation then how you taken as 40 operation .If you think that it should be 40 operation then their might be chance that in 40distinct instructions 2 , 3 instruction can have same operation. 1 1 replyShare himanshu dhawan commented Jul 20, 2021 reply Follow flag But there will be a case when we get 40 distinct instructions where we distinguish each instruction by opcode field only so we need at least 6 bits for the opcode. 0 0 replyShare Please log in or register to add a comment.
2 2 votes Ans: 16 For 40 distinct instructions, you need atleast 6 bits for Opcode For 24 distinct registers you need at least 5 bits to represent a single General purpose register. So you can see in the image, I have explained the value of x. shashankrustagi answered Aug 29, 2020 shashankrustagi comment Share Follow 0 reply Please log in or register to add a comment.
1 1 vote Answer : 16 For 40 distinct instructions : no. of bits need = Ceil (log(40)) =6 no. of bits need for 1 register =Ceil (log(24)) = 5 for another register = 5 for immediate operand : no. of bits = 32-(6+5+5) = 16 6 5 5 16 op code R1 R2 immediate shivam001 answered Dec 5, 2019 shivam001 comment Share Follow 0 reply Please log in or register to add a comment.
0 0 votes log 40=6 log 24=5 6+5*2=16 32-16=16(answer) dibakar_trailblazer answered Nov 27, 2019 dibakar_trailblazer comment Share Follow 0 reply Please log in or register to add a comment.
0 0 votes 32 - (6(bits for opcode instruction)+ 5(bits for register operand) + 5(bits for register operand)) = 16 Nandita Gautam answered Apr 21, 2020 Nandita Gautam comment Share Follow 0 reply Please log in or register to add a comment.
0 0 votes 16 bit availabe for the immediate Operand Field Arpit_Sinha answered Jul 11 Arpit_Sinha comment Share Follow 0 reply Please log in or register to add a comment.