here frequency=3GHZ

cycle time =1/frequency=1/3 *10^-9 sec

here pipeline has 3 stages and stage delay is given as :

τ_{1 }= 3/4τ_{2 }= 2τ_{3 }

now equate all stage delay in terms of τ_{1, }so that we can distinguish the largest delay_{ .}

and that is :τ_{1 }= 4/3 τ_{1 }= 1/2 τ_{1 }

so here we got_{ }4/3 τ_{1} is the largest delay_{.( } number of input is not given so we are assuming it would be a very lage number .)

time taken by pipeline is : (K+n-1)cycle time , where( cycle time = largest stage delay+buffer delay + some extra overhead ) and we have only stage delay so cycle time will be that only .now we can write it as :

n*4/3 τ_{1 = } n* 3*10^-9 ( n is very large so rest calculation with it will be negligible )

and here we got , τ_{1} =1/4 * 10^-9 ,

split the largst stage in two stages with equal delay :

stage1= τ_{1} ,stage 2= 4/6 τ_{1 stage 3 = }4/6 τ_{1 ,} stage4 _{= } τ_{1/2 }

and the largest delay = cycle time is now τ1 which is 1/4 *10^9

so** frequency = 4GHZ**