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The size of the data count register of a $\text{DMA}$ controller is $16\;\text{bits}$. The processor needs to transfer a file of $29,154$ kilobytes from disk to main memory. The memory is byte addressable. The minimum number of times the $\text{DMA}$ controller needs to get the control of the system bus from the processor to transfer the file from the disk to main memory is _________.

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Best answer
95 95 votes

Data count register gives the number of words the DMA can transfer in a single cycle..

Here it is $16$ bits.. so max $2^{16}$ words can be transferred in one cycle..

Since memory is byte addressable.. $1 \text{ word}=1\;\text{byte}$
                                                so $2^{16}$ bytes in $1$ cycle..
Now for the given file..
                               File size $=29154\ \textsf{KB} = 29154\times 2^{10}\ \textsf{B}$
                                                  $1$ cylce $\rightarrow$ DMA transfers $2^{16}\ \textsf{B}$
i.e 
                                             $1\ B$ transfered by DMA $\rightarrow \dfrac{1}{2^{16}}$ cycles.

Now, for full file of size $29154\ \textsf{KB},$

Minimum number of cylces $=\dfrac{(29154\times 2^{10}\ B)}{2^{16}}= 455.53$

But number of cylces is asked so $455.53\rightarrow 456.$

edited by
9 9 votes

Size of data count register of the DMA controller = 16 bits

Data that can be transferred in one go = 216 bytes = 64 kilobytes File size to be transferred = 29154 kilobytes.

So, number of times the DMA controller needs to get the control of the system bus from the processor to transfer the file from the disk to main memory = ceil(29154/64) = 456  

edited by
3 3 votes
  1. Convert file size to bytes:

    • 29,154 kilobytes * 1024 bytes/kilobyte = 29,805,568 bytes
  2. Calculate maximum transfer size per DMA request:

    • 2^16 - 1 = 65,535 bytes (16-bit data count register)
  3. Divide total file size by maximum transfer size:

    • 29,805,568 bytes / 65,535 bytes/request = 455.99 requests
  4. Round up to the nearest whole request:

    • 455.99 requests ≈ 456 requests
1 1 vote
Since nothing is mentioned about the mode of DMA working whether it is cycle stealing mode or burst mode, we consider it as burst mode by default.
As the data count register of the DMA is 16 bits long in burst mode DMA transfers 216 Bytes (= 64KB) once it gets the control.
To transfer 29,154 KB, no. of times DMA needs to take control
= (29,154 KB / 64KB)
= 29,154/64
= 455.53, means 456 times.
0 0 votes

456 cycles

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