GATE CSE 2024 | Set 1 | Question: 20

Question

Consider a $5$-stage pipelined processor with Instruction Fetch (IF), Instruction Decode (ID), Execute (EX), Memory Access (MEM), and Register Writeback (WB) stages. Which of the following statements about forwarding is/are CORRECT?

• A. In a pipelined execution, forwarding means the result from a source stage of an earlier instruction is passed on to the destination stage of a later instruction
• B. In forwarding, data from the output of the MEM stage can be passed on to the input of the EX stage of the next instruction
• C. Forwarding cannot prevent all pipeline stalls
• D. Forwarding does not require any extra hardware to retrieve the data from the pipeline stages 

Comments

I also did same mistake marked B and C only T.T

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Forwarding requires MUX

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• Here, the source stage means the stage that produces output, and destination stage means stage that receives data from source stage. And earlier instruction will have a source stage and later one will have a destination stage.

• "Source stage of an earlier instruction": This just means "Where is the valid data physically located right now in the pipeline hardware?" (It's sitting in the pipeline register of EX or MEM of the older instruction).

• "Destination stage of a later instruction": This means "Which stage of the younger instruction is currently waiting for this data so it can proceed?" (Usually the EX stage ALU inputs, or sometimes the MEM stage for a store instruction).

Analysis of the Statements

• Statement 1: "In a pipelined execution, forwarding means the result from a source stage of an earlier instruction is passed on to the destination stage of a later instruction" — CORRECT

  • Reason: This is the exact definition of forwarding. Instead of waiting for an earlier instruction to write its result back to the register file (in the WB stage), the intermediate result is captured from a source stage (like the output of EX or MEM) and passed directly to a destination stage (like the input of EX) for a subsequent instruction that needs it.

• Statement 2: "In forwarding, data from the output of the MEM stage can be passed on to the input of the EX stage of the next instruction" — CORRECT

  • Reason: This represents a classic data hazard scenario, such as a Load-Use dependency or an instruction following a memory-store operation. For example, in a LW R1, 0(R2) instruction followed immediately by ADD R3, R1, R4, the data fetched from memory is ready at the output of the MEM stage. Forwarding paths are explicitly designed to route this data directly to the input of the EX stage of the ADD instruction to minimize stalls.

• Statement 3: "Forwarding cannot prevent all pipeline stalls" — CORRECT

  • Reason: Forwarding cannot completely eliminate stalls caused by Load-Use data hazards when the dependent instruction immediately follows the load instruction. Because the data from a load instruction is only available at the end of the MEM stage, an instruction immediately following it needs that data at the beginning of its own EX stage. Since time cannot flow backward, a 1-cycle stall must still be introduced. It also cannot prevent structural hazards or control hazards (branches).

• Statement 4: "Forwarding does not require any extra hardware to retrieve the data from the pipeline stages" — INCORRECT

  • Reason: Forwarding requires a significant amount of additional hardware. It relies on bypassing wires (to carry the data), multiplexers at the inputs of the functional units (to select between the register file data and the forwarded data), and a dedicated Forwarding Control Unit (with comparison logic to detect matching source and destination registers).

Answer 1

Let's analyze each statement about forwarding in the context of a pipelined processor with stages Instruction Fetch (IF), Instruction Decode (ID), Execute (EX), Memory Access (MEM), and Register Writeback (WB):

1. In a pipelined execution, forwarding means the result from a source stage of an earlier instruction is passed on to the destination stage of a later instruction: This statement is CORRECT. Forwarding (also known as bypassing) is a technique used to reduce data hazards by passing the result of an instruction directly to a subsequent instruction that needs it, without waiting for the result to be written back to the register file.

2. In forwarding, data from the output of the MEM stage can be passed on to the input of the EX stage of the next instruction: This statement is CORRECT. One common form of forwarding involves passing the output of the MEM stage (where the result of a load instruction might be available) directly to the EX stage of the next instruction that needs it.

3. Forwarding cannot prevent all pipeline stalls: This statement is CORRECT. Forwarding helps mitigate certain types of data hazards, particularly read-after-write (RAW) hazards, but it cannot eliminate all types of pipeline stalls. For example, hazards arising from control dependencies (branch instructions) or certain structural hazards might still cause stalls.

4. Forwarding does not require any extra hardware to retrieve the data from the pipeline stages: This statement is INCORRECT. Forwarding requires additional hardware, such as multiplexers and control logic, to select the appropriate data to be forwarded and to ensure that the data is correctly routed to the required pipeline stages.

Therefore, the statements that are CORRECT are:

A) In a pipelined execution, forwarding means the result from a source stage of an earlier instruction is passed on to the destination stage of a later instruction.

B) In forwarding, data from the output of the MEM stage can be passed on to the input of the EX stage of the next instruction.
 

C)Forwarding cannot prevent all pipeline stalls.

Comments

But in original answer key only option A and C is correct not B anyone clarify.

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Even in the original key ,answer given is A,B,C. Check once again

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I think It was updated I download the answer key as it was just released so I might have old answer keys. Am I right?

Answer 2

 

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1. “In a pipelined execution, forwarding means the result from a source stage of an earlier instruction is passed on to the destination stage of a later instruction.”

   • Correct. Forwarding (bypassing) ka basic concept hi yeh hai ki pehle instruction ka output (jo pipeline ke kisi stage par produce hua hai) agle instruction ke required stage tak seedha “forward” kar diya jaata hai, taaki woh data register file me writeback hone se pehle hi use ho sake.

2. “In forwarding, data from the output of the MEM stage can be passed on to the input of the EX stage of the next instruction.”

   • Correct. Typical 5‐stage pipeline me forwarding paths often EX→EX (same cycle), ya MEM→EX hoti hain. Agar instruction n ka result MEM stage me ready ho jaata hai, toh instruction n+1 ke EX stage ko ye data forward kiya jaata hai.

3. “Forwarding cannot prevent all pipeline stalls.”

   • Correct. Forwarding data hazards (RAW type) kaafi hat tak solve kar deta hai, par kuch hazards, jaise load‐use hazard (agar data load se turant agle instruction me use ho raha ho aur forward karne ka time na ho), control hazards (branches), ya structural hazards, phir bhi stalls la sakte hain. Forwarding sab stalls ko eliminate nahi kar sakta.

4. “Forwarding does not require any extra hardware to retrieve the data from the pipeline stages.”

   • Incorrect. Forwarding ke liye bypass paths aur multiplexers chahiye hote hain, jisse aap EX/MEM stage ke outputs ko agle EX stage me daal sako. Yeh sab additional hardware hi hai.

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Conclusion

• Statements (1), (2), aur (3) are Correct.
• Statement (4) is False.

 

Comments

take my upvote for solving in hindi!

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Its GPT's Response .

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best answer thankkk uuu, hamesha ki tarah

Answer 3

A C

A. True , bcoz a situation like forwarding to a earlier stage of next instruction will be a  (RAW) data hazards and Pipeline forwarding or bypassing  is technique to avoid stall due to RAW hazards."The forwarding unit detects hazards by comparing the destination registers to the source registers of the current instruction."
So the destination of the forwarding can never be a  earlier stage of next instruction.So such a case will never even arise.
In forwarding the destination is already decided wrt to the source stage and will never be a  earlier stage of next instruction.
ie "earlier stage of next instruction" is not even a possible candidate for destination (otherwise it will be a data hazard)
So A is correct. 

B. False bcoz EX of the next instruction will be overlapping with the MEM of current instruction . So the output of MEM of current can't be given as input to EX of next. 
If you consider split phase ie "writing at rising edge and reading at falling edge" ,this concept has nothing to do with Operand forwarding, it nowhere relates to the concept of operand forwarding.
This was said by Sachin Mittal in a comment. 
https://gateoverflow.in/1391/gate-cse-2005-question-68?show=95597#c95597

This is by ARJUN sir : https://gateoverflow.in/1391/gate-cse-2005-question-68?show=95621#c95621

C. True

D. False... MUX  a special "forwarding" circuit is implemented using the buffers and MUX

Have a read 
https://web.archive.org/web/20131227033204/http://hpc.serc.iisc.ernet.in/~govind/hpc/L10-Pipeline.txt
https://www.cs.uaf.edu/2011/fall/cs441/lecture/09_20_pipelining.html
https://courses.cs.washington.edu/courses/cse378/07au/lectures/L12-Forwarding.ppt

Comments

Regarding Option B. Forwarding is not possible between MEM to EX on the next cycle. But it can be done after a stall. So it can be done in that sense.

To Quote Hennesey and Patterson:

desired data would be available only after the fourth stage of the first instruction
in the dependence, which is too late for the input of the third stage of sub. Hence,
even with forwarding, we would have to stall one stage for a load-use data hazard, (page 280)

load-use data hazard
A specific form of data
hazard in which the data
being loaded by a load
instruction has not yet
become available when
it is needed by another
instruction. (page 280)

Reference: Hennesy & Patterson. Computer Organization and Design: The Hardware/Software Interface, Fifth Edition

Link: https://www.cse.iitd.ac.in/~rijurekha/col216/edition5.pdf

Also, this book(https://www.cse.iitd.ac.in/~srsarangi/advbook/chapters/ooo-pipelines.pdf) at page 16, citied as the reason for correctness of option B, makes no such claims. They are not passing the output of MEM stage to the input of EX stage but the input of MEM stage to the input of EX stage. Read the text properly!

 

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Hi @himanshu2001   , thanks for citing resource. The book you cited is better than "William Stallings" which is considered the standard book.
What standard book do you recommend for other subjets?
OS,DBMS,CN,DE,DS and C programming.

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CN=> Forouzen

DBMS => Raghuramakrishnan

OS => Galvin

DS & C => Corman

DLD => Morris Mano