GATE CSE 1992 | Question: 5-a

Question

The access times of the main memory and the Cache memory, in a computer system, are $500$ n sec and $50$ nsec, respectively. It is estimated that $80\%$ of the main memory request are for read the rest for write. The hit ratio for the read access only is $0.9$ and a write-through policy (where both main and cache memories are updated simultaneously) is used. Determine the average time of the main memory (in ns).

Comments

NOTE FOR SELF

• 176 ns requires the extra assumption that on a read miss you do not add the initial cache probe time (i.e., miss cost = only main memory). That’s less standard because normally you first probe the cache (50 ns) then access main memory (500 ns) — so miss = 550

• 180 ns is the most reasonable interpretation given the wording “both main and cache memories are updated simultaneously” and the usual treatment of read misses (cache probe + main memory). So 180 ns is the most likely intended exam answer.
  
  src: gpt

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where both main and cache memories are updated simultaneously is used , given in ques so, hierarchical is used

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Average time of the main memory  =  time spend for read + time spend for write

mm access time = 500ns

cache access time = 50ns

read operation  = 80 %

write operation  = 20 %

hit ratio for only read access = 0.9

AMAT = read time when cache miss  + read time when cache miss + write time when cache hit + write

             time when cache miss

             0.8 * [0.9 * 50 + 0.1 * (50+500) ]  + 0.2 * [0.9 * 500 +  0.1 * 500]

            180 ns

answer = 180ns

 

Answer 1

Average memory access time $=$  Time spend for read $+$ Time spend for write

$=$ Read time when cache hit $+$ Read time when cache miss $+$ Write time when cache hit $+$ Write time when cache miss

$= 0.8 \times 0.9 \times 50 + 0.8 \times 0.1 \times (500+50) $

(assuming hierarchical read from memory and cache as only simultaneous write is mentioned in question) $+ 0.2 \times 0.9 \times 500 + 0.2 \times 0.1 \times 500 $ (simultaneous write mentioned in question)

$= 36 + 44 + 90 + 10 = 180$ ns.

Reference: http://www.howardhuang.us/teaching/cs232/24-Cache-writes-and-examples.pdf

Comments

In write through policy, whether you hit or miss while writing you have to update both CM and MM. Since we do it simultaneously so write time will be the largest of two i.e. MM. So write hit ratio is useless to talk about in case of write through and thus no question will give you that. What I do for ease is to assume write hit ratio is $x$. Then average write time will be, $x\times(100ns) + (1-x)\times(100ns)$ which actually comes out to be just $100ns$ after $x$ cancels out.

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@Arjun sir could you please clear when to take simultaneous and when to take hirarcheial acces

And Is there any standard resources mentioned about simultaneous and hirarcheial concepts..!?  

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@Arjun sir in question asked for only Main memory access so why conidered for cache hit too..?! 

Can we do like this?!

TavgR= 0.8 ( 0.1*(50+500) )

Here only considers main memory access

And rest is same 

Why can't we do like this..?! 

Answer 2

They are asking for the average memory access time.

 

If nothing is mentioned whether it is a simultaneous memory access or hierarchical memory access, we need to consider it as hierarchical memory access only. Here in this question nothing is given about read operation so we need to take it as hierarchical memory access for read operation. But for write it is given as write through policy, which will result in simultaneous memory access. Also for write operations write-through cache always go to the main memory, in main memory its hit rate is 100%. Hence Hit rate for write= 1.

 

Since there are 80% read operations and 20% write operations,

Average memory access time =  0.8 * Time spent for read + 0.2 * Time spent for write

 

Time spent for read = Hit-rate-for-read * cache access time + Miss-rate-for-read(cache access time + main memory access time)

= ( 0.9 ⨯ 50 + 0.1 ⨯ (500+50) )

= 45+55 = 100

 

Time spend for write = 500ns (simultaneous write mentioned in question)

 

Average memory access time =  0.8 * 100 + 0.2 * 500 = 80+100 = 180ns

Comments

@manojsahu @Shashwat21225  @Arjun how read memory access is hierarchical? I agree with the logic for write operation which would eventually have to simultaneous memory access

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I have this same doubt. Why write does not take 0.2 *550? @Sachin Mittal 1

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When a write operation is taking place in the cache it would take 50ns and also we need to update the value in main memory which would take 500ns,both these operations are performed parallelly .So after 50ns the case would be updated but the memory updation is still taking place ,so we would anyhow need to wait for the larger operation .Hence we take the max of(50,500).

Answer 3

when write through is implemented in a simultaneous access memory organization ,then hit ratio for write operation always become 1.(There is nothing given about write hit ratio)

$T_{avg\ write }$=500 ns.

$T_{avg \ read}=h_1*T_c+(1-h_1)*T_m$

                 $=.9*50 ns+.1*500 ns$

                 $=95ns$

 the average time of the main memory$=.8*95ns+.2*500ns$

                                                            $=176ns$

correct me if done any mistake.thank you

Comments

no i was asking about reasoning. See what i understood that if we are updating the cache then every update goes through main memory only so that's why hit ratio is always 1. right?

And one more thing you have used simultaneous access for read also but in question its mentioned for update only its no where mentioned that simultaneously we are reading in both cache as well as mm.

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yes this answer should be the best answer.

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Yes this answer is correct because the question itself has mentioned that it will be simultaneous access of cache and main memory via write thru mechanism so the formula for the Tavg is

Tavg = Tavg Read + Tavg Write

= ratio of Read (Hit ratio(T cache) + (1-Hit ratio)(T memory)) + ratio of Write(max(T cache, T memory))

= 0.8(0.9(50) + 0.1(500)) + 0.2(500) ns

= 176ns

Answer 4

180ns

Answer 5

answer is 200ns=50+ 0.2x500x0.9(write through that are in cache)+ 0.8x0.1x500(read misses)+0.2x(500+500)x0.1(write through that are not in cache)

Comments

Yes. I guess another reason is there is no need for the cache update to be done for the CPU to get the data. From the main memory, data can be simultaneously passed to the CPU and updated in the cache. There is no need to wait for the cache update to be finished.

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 @Arjun

From the main memory, data can be simultaneously passed to the CPU and updated in the cache. 

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In write operation , when there is a miss then the time will be 0.2 * (0.1 *(500+500))

500ns for accessing the main memory for the required block(to write in) and again 500ns to simultaneously write to both cache and main memory.

Isnt it?

Answer 6

Ans

Comments

@goku4199 can you clear my doubt in write operation why don't we take 550 but 500? 

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@vxi lin some questions are weird....achieving perfectness and understanding everything might just be an illusion......the question asked avg mem access time if we consider cache time then we will not get the ans. If we don't consider it then we get the ans so the reason might be somewhere is taking and not taking the cache access time. 

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I thought about it again revisited my notes  idk if this logic is correct or not given that we've used write through the best combination is no write allocate policy and in no write allocate policy we're updating the access time in parallel in both cache and main memory . Main memory wouldn't write back to cache hence we do not need to consider the cache memory access time.

anyway, thanks for the help!