GATE CSE 2015 Set 1 | Question: 37

Question

A positive edge-triggered $D$ flip-flop is connected to a positive edge-triggered $JK$ flip-flop as follows. The $Q$ output of the $D$ flip-flop is connected to both the $J$ and $K$ inputs of the $JK$ flip-flop, while the $Q$ output of the $JK$ flip-flop is connected to the input of the $D$ flip-flop. Initially, the output of the $D$ flip-flop is set to logic one and the output of the $JK$ flip-flop is cleared. Which one of the following is the bit sequence (including the initial state) generated at the $Q$ output of the $JK$ flip-flop when the flip-flops are connected to a free-running common clock? Assume that $J = K = 1$ is the toggle mode and $J = K = 0$ is the state holding mode of the $JK$ flip-flops. Both the flip-flops have non-zero propagation delays.

• A. $0110110\ldots$
• B. $0100100\ldots$
• C. $011101110\ldots$
• D. $011001100\ldots$

Answer 1

$${\begin{array}{|c|c|c|l|}\hline
\bf{Q_{prev}}&    \textbf{D}&  \textbf{Q(JK)}&\bf{Explanation} \\\hline
\text{-}&1&0&\text{Now, the D output is 1, meaning J and K = 1; for next cycle} \\\hline 0&0&1& \text{J = K = 1(D output from prev state), so output toggles from 0 to 1} \\ \hline    1&1&1&\text{J = K = 0, so output remains 1} \\ \hline   1&1&0& \text{J = K = 0, so output remains 1} \\ \hline   0&0&1& \text{J = K = 1, so output toggles from 0 to 1}\\ \hline   1&1&1& \text{J = K = 0, so output remains 1}  \\ \hline    
\end{array}}$$
$\text{D}$ flipflop output will be same as its input and $\text{JK}$ flipflop output toggles when $1$ is given to both $\text{J}$ and $\text{K}$ inputs.
i.e., $Q = D_{\text{prev}}({Q_{\text{prev}}}') + ({D_{\text{prev}}}')Q_{\text{prev}}$

Correct Answer: $A$

Comments

yes sir , its clear now :)

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sir..in second row..if we are taking D as 0 then input to JK is 00 then ...isnt it the output Q same as the prevoius output 0 there ?? 

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The diagram for this question

Answer 2

D	QD	QJK	J	K	Q+JK
0	1	0	1	1	1
1	0	1	0	0	1
1	1	1	1	1	0
0	1	0	1	1	1

Answer = A = 01101101....

Answer 3

Correct option: A

Comments

this question is similar to https://gateoverflow.in/118315/gate2017-1-33

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Why Q0 is taken as MSB and Q1 is taken as LSB in FF diagram. ?,  Any specific reason.

 

What if Q0 is taken as LSB and Q1 as MSB, we get same answer (sequence) ?

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I think in question, Q op of JK ff is asked so bit sequence of Qjk is the ans whch isn't in ur ans but anyone can chk it from above answers we r gettign string of tht only

Answer 4

Bit sequence is 0110110