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Machine instructions and Addressing modes. ALU, data‐path and control unit. Instruction pipelining. Pipeline hazards, Memory hierarchy: cache, main memory and secondary storage; I/O interface (Interrupt and DMA mode)

$$\scriptsize{\overset{{\large{\textbf{Mark Distribution in Previous GATE}}}}{\begin{array}{|c|c|c|c|c|c|c|c|}\hline
\textbf{Year}& \textbf{2024-1} & \textbf{2024-2} & \textbf{2023} &  \textbf{2022} & \textbf{2021-1}&\textbf{2021-2}&\textbf{Minimum}&\textbf{Average}&\textbf{Maximum}
\\\hline\textbf{1 Mark Count} & 2&2&2& 3 &1&2&1&2&3
\\\hline\textbf{2 Marks Count} & 3&3&4& 2 &2&2&2&2.67&4
\\\hline\textbf{Total Marks} & 8&8&10& 7 &5&6&\bf{5}&\bf{7.33}&\bf{10}\\\hline
\end{array}}}$$

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Most answered questions in CO and Architecture

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3382
which register is fastest (data, program counter...)
which register is fastest among following Accumulator, Data Register, Address Register, program counter(PC), Memory Data Register (MDR) ,Index register,Memory Buffer Register.stack pointer
which register is fastest among followingAccumulator, Data Register, Address Register, program counter(PC), Memory Data Register (MDR) ,Index register,Memory Buffer Regi...
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3386
pipelining
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3387
Test by Bikram | Computer Organization and Architecture | Test 2 | Question: 14
Match the following: ... -s i-r, ii-s, iii-q, iv-p i-r, ii-s, iii-p, iv-q i-r, ii-p, iii-s, iv-q
Match the following:$\begin{array}{|l|l|l|l|} \hline (i) & \text{Base addressing} & (p) & \text{Pointers} \\ \hline (ii) & \text{Indexed addressing} & (q) & \text{Loops} ...
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3390
Coa_interrupt handling.
Please! Tell me how we allocate interrupt vectors in interrupt vector table. How we decide how many allocation should be provide in table? Like 128 bytes may be allocate to hold a table of 32 interrupt vactors. How this could be decide ☝
Please! Tell me how we allocate interrupt vectors in interrupt vector table. How we decide how many allocation should be provide in table?Like 128 bytes may be allocate t...
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3391
ISRO 2017-69
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3392
micro processor
Find the memory address of the next instruction executed by the microprocessor (8085), when operated in real mode for base segment =800 and offset is=E000.
Find the memory address of the next instruction executed by the microprocessor (8085), when operated in real mode for base segment =800 and offset is=E000.
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3393
#Computer organisation
If a microcomputer operates at 9 MHz with an 8-bit bus and a newer version operates at 18 MHz with a 64-bit bus, the maximum speed-up possible approximately will be 2 4 8 16 plz explain how to calculate speedup plz clear my doubt
If a microcomputer operates at 9 MHz with an 8-bit bus and a newer version operates at 18 MHz with a 64-bit bus, the maximum speed-up possible approximately will be24816 ...
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3394
cache
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3395
memory
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3396
Isro question doubt.
Please explain this question along with answer https://gateoverflow.in/16309/isro2014-1 I think answer should be 3, plz crct me?
Please explain this question along with answerhttps://gateoverflow.in/16309/isro2014-1I think answer should be 3, plz crct me?
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3397
Addressing mode_coa
Define these terms and relationship among these. -Absolute mode -relative mode -effective address
Define these terms and relationship among these. -Absolute mode-relative mode-effective address
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3398
Doubt from William Stallings
Please explain this excerpt from Stallings.How d calculation has been done?
Please explain this excerpt from Stallings.How d calculation has been done?
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3399
Block replacement in cache
How we replace blocks in k-way set associative cache ? What strategy we follow?
How we replace blocks in k-way set associative cache ? What strategy we follow?
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3400
Peripheral devices : CAO
Consider READ and WRITE bits: a) Both are written by CPU b) Both are written by peripheral c) READ bit is written by peripheral while WRITE bit is written by CPU d) WRITE bit is written by peripheral while READ bit is written by CPU
Consider READ and WRITE bits:a) Both are written by CPUb) Both are written by peripheralc) READ bit is written by peripheral while WRITE bit is written by CPUd) WRITE bit...
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