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Recent questions tagged carl-hamacher
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Computer Organisation Textbook Questions
Consider the case memory which has 0.8 and 0.9 hit ratio for read and write operation. Whenever there exist here miss either read or write 2 word block is to be moved fro...
aashish1406
1.0k
views
asked
Aug 19, 2023
CO & Architecture
co-and-architecture
reference-book
cache-memory
carl-hamacher
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0
0 answers
1.2k
1.2k views
Quantify the effect on performance that result from the use of a cache in the case of a program that has a total of 500
Quantify the effect on performance that results from the use of a cache in the case of a program that has a total of 500 instructions, including a 100-instruction loop th...
Anshul kumar singh
1.2k
views
asked
Jul 18, 2022
CO & Architecture
co-and-architecture
carl-hamacher
cache-memory
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4
4 votes
0
0 answers
842
842 views
CARL HAMCHER CHAPTER 1 INSTRUCTION SET ARCHITECTURE, Question 2.20
Consider the following possibilities for saving the return address of a subroutine: (a) In a processor register (b) In a memory location associated with the call, so that...
Akshara Nair
842
views
asked
Dec 6, 2021
CO & Architecture
co-and-architecture
carl-hamacher
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0
0 votes
0
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1.3k
1.3k views
Carl Hamacher: Machine Instruction and Programs-Chapter $2$
Register $R_{1}$ and $R_{2}$ of a computer contain the decimal values $1200$ and $4600$ . What is the effective address of the memory operand in each of the following ins...
srestha
1.3k
views
asked
Apr 2, 2019
CO & Architecture
co-and-architecture
carl-hamacher
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2
2 votes
0
0 answers
892
892 views
Suggestion
Can anyone tell me the relevant topics and chapters to read from Carl Hamacher book for Computer Organisation? Apart from that what can be a good source to learn CO? I h...
subho16
892
views
asked
Jan 5, 2019
GATE
co-and-architecture
carl-hamacher
gate-preparation
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0
0 votes
0
0 answers
480
480 views
Hamacher
aditi19
480
views
asked
Dec 8, 2018
CO & Architecture
co-and-architecture
carl-hamacher
cache-memory
memory-interfacing
effective-memory-access
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0
0 votes
1
1 answer
7.5k
7.5k views
Hamacher 6th edition Q8.8
A block-set-associative cache consists of a total of 64 blocks, divided into 4-block sets.The main memory contains 4096 blocks, each consisting of 32 words. Assuming a 32...
GAURAV_JAIN
7.5k
views
asked
Dec 4, 2018
CO & Architecture
co-and-architecture
carl-hamacher
cache-memory
numerical-answers
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0
0 votes
0
0 answers
687
687 views
Hamacher
what is the approach to this problem? also, what will be the solution for little endian notation?
aditi19
687
views
asked
Nov 20, 2018
CO & Architecture
co-and-architecture
carl-hamacher
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0
0 votes
1
1 answer
1.6k
1.6k views
self doubt(carl hamacher,chapter1)
Quantify the effect on performance that result from the use of a cache in the case of a program that has a total of $500$ instruction including a $100$ instruction loop t...
BASANT KUMAR
1.6k
views
asked
Jun 4, 2018
CO & Architecture
carl-hamacher
co-and-architecture
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0
0 votes
0
0 answers
868
868 views
There seem two version of carl hamacher books? which one to get?
1. Computer Organization and Embedded Systems 6e Paperback – 1 Jul 2017 2. Computer Organization Paperback 5e – 4 Nov 2011Are these two same, because titles are different...
cynicthnkr
868
views
asked
Apr 6, 2018
CO & Architecture
carl-hamacher
co-and-architecture
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3
3 votes
0
0 answers
2.2k
2.2k views
Hamacher
7.14 A pipeline processor uses the delayed branch technique. You are asked to recommend one of the two possibilities for the design of this processor. In the first possi...
Tesla!
2.2k
views
asked
Dec 19, 2017
CO & Architecture
carl-hamacher
pipelining
co-and-architecture
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3
3 votes
1
1 answer
2.0k
2.0k views
Hamacher Instruction Pipelining Doubt
Can anyone explain the concept of branch folding, I didn't get it after reading from hamacher.Further it was explained using this diagram,I have a doubt here : Is it poss...
Sourajit25
2.0k
views
asked
Nov 22, 2017
CO & Architecture
pipelining
co-and-architecture
cache-memory
carl-hamacher
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2
2 votes
0
0 answers
576
576 views
General Topic Doubt <CO & Architecture>:<solution-manual>
Greetings gate aspirants!..Does anyone have computer architecture carl hamacher 5th edition or solution manual to 6th edition?...I am having the book of 6th edition and I...
Surajit
576
views
asked
Nov 12, 2017
Study Resources
co-and-architecture
carl-hamacher
solution-manual
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3
3 votes
1
answers
1 answer
4.6k
4.6k views
Carl Hamacher - Example 8.3 Cache Doubt
Problem: A computer system uses 32-bit memory addresses and it has a main memory consisting of 1G bytes. It has a 4K-byte cache organized in the block-set-associative man...
Rishabh Gupta 2
4.6k
views
asked
Oct 18, 2017
CO & Architecture
co-and-architecture
carl-hamacher
cache-memory
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0
0 votes
1
1 answer
659
659 views
hamacher
A disk has 24 recording surfaces ,it has a total of 14,000 cylinders.there is an average of 400 sectors per track.Each sector contain 512 bytes of data a) using a 32 bit ...
set2018
659
views
asked
Aug 26, 2017
CO & Architecture
co-and-architecture
carl-hamacher
disk
memory-interfacing
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2
2 votes
3
answers
3 answers
5.0k
5.0k views
hamacher
set2018
5.0k
views
asked
Jul 21, 2017
CO & Architecture
co-and-architecture
carl-hamacher
machine-instruction
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5
5 votes
2
answers
2 answers
6.5k
6.5k views
Carl-Hamacher
A computer system has a main memory consisting 1M 16 bit-words.It also has a 4K-word cache organized in the block-set-associative manner,with 4 blocks per set and 64 word...
reena_kandari
6.5k
views
asked
Jun 7, 2017
CO & Architecture
co-and-architecture
carl-hamacher
cache-memory
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2
2 votes
0
0 answers
891
891 views
Carl-Hamacher
Acomputer with a 16-bit word length has a direct-mapped cache, used for both instructionsand data. Memory addresses are 16 bits long, and the memory is byte-addressable.T...
reena_kandari
891
views
asked
Jun 7, 2017
CO & Architecture
co-and-architecture
carl-hamacher
cache-memory
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0
0 votes
2
2 answers
2.4k
2.4k views
Carl hamacher
A program consists of two nested loops—a small inner loop and a much larger outer loop.The decimal memory addressesshown delineate the location of the two loops and the b...
reena_kandari
2.4k
views
asked
Jun 7, 2017
CO & Architecture
co-and-architecture
carl-hamacher
cache-memory
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7
7 votes
1
answers
1 answer
40.4k
40.4k views
Carl Hamacher
Registers R1 and R2 of a computer contain the decimal values 1200 and 4600.What is the Effectiveaddress of the memory operand in each of the following instructions?a) Loa...
reena_kandari
40.4k
views
asked
Jun 4, 2017
CO & Architecture
co-and-architecture
carl-hamacher
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0
0 votes
1
1 answer
5.4k
5.4k views
Internal organization of memory chip.
What are external connection in "internal organization of memory chip" ? How these lines are decided ?Example memory with 128 bits (16×8) requires 14 external connections...
elakashi sharma
5.4k
views
asked
Apr 21, 2017
CO & Architecture
memory-management
carl-hamacher
+
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