Register

Web Page

Machine instructions and Addressing modes. ALU, data‐path and control unit. Instruction pipelining. Pipeline hazards, Memory hierarchy: cache, main memory and secondary storage; I/O interface (Interrupt and DMA mode)

$$\scriptsize{\overset{{\large{\textbf{Mark Distribution in Previous GATE}}}}{\begin{array}{|c|c|c|c|c|c|c|c|}\hline
\textbf{Year}& \textbf{2024-1} & \textbf{2024-2} & \textbf{2023} &  \textbf{2022} & \textbf{2021-1}&\textbf{2021-2}&\textbf{Minimum}&\textbf{Average}&\textbf{Maximum}
\\\hline\textbf{1 Mark Count} & 2&2&2& 3 &1&2&1&2&3
\\\hline\textbf{2 Marks Count} & 3&3&4& 2 &2&2&2&2.67&4
\\\hline\textbf{Total Marks} & 8&8&10& 7 &5&6&\bf{5}&\bf{7.33}&\bf{10}\\\hline
\end{array}}}$$

Filter

Hot questions in CO and Architecture

0 votes
0 answers
3271
Differentiate the following
Differentiate the Following Memory Mapped IO Program Driven IO
Differentiate the Following Memory Mapped IOProgram Driven IO
User Avatar
0 votes
0 answers
3272
ME-Practice Book COA Q#10
User Avatar
0 votes
1 answer
3273
Doubt
Min number of registers required to evaluate below expression: x = ( a+b) * (c+d) I am getting 2 but answer is 3. Solution: 1) Load r1,a 2) Add r1, b 3) Load r2, c 4) Add r2,d 5) Mul r1,r2 6) store x, r1
Min number of registers required to evaluate below expression:x = ( a+b) * (c+d)I am getting 2 but answer is 3.Solution: 1) Load r1,a2) Add r1, b3) Load r2, c4) Add r2,d5...
User Avatar
1 votes
0 answers
3274
made easy
User Avatar
1 votes
0 answers
3275
vgate
i felt data is insufficient. access time of secondary memory is not mentioned
i felt data is insufficient.access time of secondary memory is not mentioned
User Avatar
1 votes
0 answers
3276
vgate
isn't it actually 597 ns? i did not find any way to get 595ns. given answer is B
isn't it actually 597 ns?i did not find any way to get 595ns.given answer is B
User Avatar
0 votes
0 answers
3279
Good Source to study Cache Misses
suggest a good souyrce to study various misses and when they occur ,what are the remdies etc?
suggest a good souyrce to study various misses and when they occur ,what are the remdies etc?
User Avatar
0 votes
1 answer
3281
facebook cs group
my ans in not matching to any option ?? i am getting 12??? is it right ??
my ans in not matching to any option ?? i am getting 12??? is it right ??
User Avatar
1 votes
1 answer
3282
how to find number of multiplexer in direct mapping..
User Avatar
2 votes
1 answer
3284
Cache Computer Org
Cache memory enhances memory capacity average memory access time secondary storage capacity secondary storage access time
Cache memory enhancesmemory capacityaverage memory access timesecondary storage capacitysecondary storage access time
User Avatar
1 votes
0 answers
3285
CO:
What are some study materials for CO ? Please provide links and pdf's and also mention some important topics that students generally leave but should not be left. I don't want to read Textbook, and also suggest me good problems on Pipelining. Thanks in advance
What are some study materials for CO ? Please provide links and pdf's and also mention some important topics that students generally leave but should not be left.I don't ...
User Avatar
0 votes
1 answer
3286
Consider the following code: for (i=0; i <20; i++) for ( j= 0; j< 10; j++) a[i] a[i]* j a. Give one example of the spatial locality in the code. b. Give one example of the temporal locality in the code.
Consider the following code:for (i=0; i <20; i++) for ( j= 0; j< 10; j++) a[i] = a[i]* j ;a. Give one example of the spatial locality in the code.b. Give one example of t...
User Avatar
3 votes
2 answers
3289
test series
User Avatar
0 votes
1 answer
3290
16 KB, 4-way set-associative cache, 32-bit address, byte addressable memory, 32-byte cache blocks/lines
16 KB, 4-way set-associative cache, 32-bit address, byte addressable memory, 32-byte cache blocks/linesHow many tag bits?Where would you find the word at address 0x200356...
User Avatar
Page: