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If half adders and full adders are implements using gates, then for the addition of two $17$ bit numbers (using minimum gates) the number of half adders and full adders required will be

  1. $0,17$
  2. $16,1$
  3. $1,16$
  4. $8,8$

5 Answers

Best answer
11 11 votes
Option c ) 1 half adder 16 Full adder
4 4 votes
Ans (c)

1 H.A    and   (n-1) F.A
1 1 vote
Let the two 17 bit numbers be,

(a0 a1 a2 a3....a16)

(b0 b1 b2.........b16)

1 half adder will take input a16, b16 and return a sum and a carry. This carry will be forwarded to the next adder (full adder). The first full adder will take three inputs (the carry from previous stage, a15, b15) and generate the next sum and next carry for the second full adder. In this way, 16 full adders are used.

So, 1 H.A and 16 F.A (ans)
0 0 votes
for implementation n-bit of parallel adder n bit full adder required.

n bit full adder = (n-1) full adder and 1 half adder required.

so accoring to the question 16 full adder and 1 half adder required.

so option c is correct.
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