9 votes 9 votes If half adders and full adders are implements using gates, then for the addition of two $17$ bit numbers (using minimum gates) the number of half adders and full adders required will be $0,17$ $16,1$ $1,16$ $8,8$ Digital Logic isro2015 digital-logic adder + – ajit asked Oct 12, 2015 edited Jun 10, 2020 by Sabiha banu ajit 9.6k views answer comment Share Follow See all 3 Comments See all 3 3 Comments reply akankshadewangan24 commented Jun 24, 2017 reply Follow Share explain it in detail plz 0 votes 0 votes Ashwani Kumar 2 commented Apr 20, 2018 reply Follow Share We have two 17 bit numbers, one adder is used for adding one bit so for the least significant bit we don't need any full adder as we always have 0 as initial carry for the LSB so we can add LSB using half adder but for rest of the 16 bits from 2nd bit from right to MSB we need full adder because carry can be generated by them hence there is need of 16 full adder. Hence option C) is correct 1 votes 1 votes register_user_19 commented Oct 30, 2018 reply Follow Share same question - https://gateoverflow.in/1494/gate1999-2-16 1 votes 1 votes Please log in or register to add a comment.
0 votes 0 votes for implementation n-bit of parallel adder n bit full adder required. n bit full adder = (n-1) full adder and 1 half adder required. so accoring to the question 16 full adder and 1 half adder required. so option c is correct. Pradosh123 answered May 3, 2020 Pradosh123 comment Share Follow See all 0 reply Please log in or register to add a comment.