1 1 vote Suppose there are $2$ level cache. If there are $L_{1}$ and $L_{2}$ are $2$ level cache, if both have some miss rate, then still why we need miss penalty for cache in both levels? CO & Architecture cache-memory co-and-architecture miss-penalty + – srestha 678 views answer comment Share Follow Print See all 2 Comments 2 2 Comments reply Abhisek Tiwari 4 commented Dec 27, 2018 i edited by Abhisek Tiwari 4 Dec 27, 2018 reply Follow flag CPU | | Cache(L1) | | Cache(L2) | | Main Memory(B1,B2,B3) As we always search T1 then only T2 the MM i.e why Teff=H1*T1+(1-H1)H2*T2+(1-H1)*(1-H2)*M [ provided Pralell searching is used] 0 0 replyShare srestha commented Jan 16, 2019 reply Follow flag https://gateoverflow.in/294602/applied-course 1 1 replyShare Please log in or register to add a comment.
