The propagation delay, or gate delay, is the length of time which starts when the input to a logic gate becomes stable and valid to change, to the time that the output of that logic gate is stable and valid to change.
So from t = 0 to 10, output of XOR gate is 0. Input A to XOR gate is 1. After t = 10, output is stable, considering another input of the XOR gate is 0, output Y is 1. The one input to XOR gate(i.e output of AND gate) destabilise at t = 30 and again stabilses, becomes 0. Output of XOR gate again stabilises to 0 after t = 40 as gate delay for XOR gate is 10 ns.
Hence option B.