Combinational Circuits: Adders

Question

A full adder circuit is implemented using 2-input AND, OR gates; each of which takes 1 unit of delay. If inputs are also available in complements forms, what will be the delay of full adder (in units)?

Comments

if we ignore the delay of not gate then i think delay will be 4*1=4 unit

---

Here NOT gate also required. right??

Answer 1

$18$ units of delay, Each AND gate requires $1$ bit delay, and NOT  required $1$ bit delay. Input present in complemented form, but that will not reduce number of NOT gate.

Comments

yes, ans will be then $6*2=12$ unit

right??

---

yes 12 unit is right.

---

good afternoon.How can i connect 4 of those full adders for 4 bit