Combinational Circuits: Adders

Question

A full adder circuit is implemented using 2-input AND, OR gates; each of which takes 1 unit of delay. If inputs are also available in complements forms, what will be the delay of full adder (in units)?

Comments

if we ignore the delay of not gate then i think delay will be 4*1=4 unit

---

Here NOT gate also required. right??

Answer 1

$18$ units of delay, Each AND gate requires $1$ bit delay, and NOT  required $1$ bit delay. Input present in complemented form, but that will not reduce number of NOT gate.

Comments

ma'am can you explain little bit more how 18 unit???some gate will work in parallel.check one more time.

---

if some GATE works parallel , what change will shown in output??

---

suppose a circuit has two gates which are work in parallel and their delay is 2 unit each then overall delay of the circuit will have 2 unit delay, not 4 unit delay.i think in your solution you considered 18  gates(AND+NOT) and delay =18*1=18 unit. why you consider the delay of those gates which are working simultaneously means in parallel.

---

yes, ans will be then $6*2=12$ unit

right??

---

yes 12 unit is right.

---

good afternoon.How can i connect 4 of those full adders for 4 bit