in Digital Logic retagged by
597 views
3 votes

Using $\text{D}$ flip-flop gates, design a parallel-in/serial-out shift register that shifts data from left to right with the following input lines:

  1. Clock $\text{CLK}$

  2. Three parallel data inputs $A, B, C$

  3. Serial input $S$

  4. Control input $\text{load} / \overline{\text{SHIFT}}$.

in Digital Logic retagged by
597 views

Subscribe to GO Classes for GATE CSE 2022

2 Answers

0 votes
Refer the Logic diagram for the  parallel-in/serial-out SHIFT REGISTER, using D flip-flop gates that shifts data from left to right in this video : https://youtu.be/7LmBcGiiYwk
–2 votes
ii. three parallel inputs A,B,C

2 Comments

@Khamer can you please explane how?
0
This question is not objective type. According to the question we just have to design the Shift register.
0

Related questions