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Using $\text{D}$ flip-flop gates, design a parallel-in/serial-out shift register that shifts data from left to right with the following input lines:

  1. Clock $\text{CLK}$

  2. Three parallel data inputs $A, B, C$

  3. Serial input $S$

  4. Control input $\text{LOAD} / \overline{\text{SHIFT}}$.

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