Digital Logic made easy

Question

Consider the circuit given below:

MSB and LSB of mod 10 ripple counter act as clock to ripple down and up counter respectively. Initially all the counters were cleared and output of comparator was A=B. The clock pulse is applied. Find the minimum no of clock pulses required to make A=B again.

Comments

is it 19?

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No the answer is given 17

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Kindly see where am I going wrong @HeadShot

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@prashant jha 1 

Check this. I checked it 3-4 times but not getting any mistake ( modulo N counter means 0 to N-1 states i believe ) 

( you took 0 to N)

[ LSB 1 means number is ODD hence clocked at odd count and  C2 will be clocked at 8 and 9 only ]

 

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@prashant jha 1 

may be didn't trigger down counter on MSB somewhere. Check it once.

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@prashant jha 1

You have taken mod-11 counter ..the state 1010 won't be there..

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Hahaha... Sorry my bad , thanks for pointing it out @MiNiPanda

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" Initially all the counters were cleared "

does this mean,

UP counter = 0

Down counter = 9 ?

why not Down Counter = 0 ?

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@Shaik Masthan

all will be 0s only..

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@MiNiPanda 

Whats wrong ?

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@HeadShot 

at clock 9, why did you change C3 from 9 to 8..?

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@MiNiPanda 

Okay..got the mistake.

Clock doesn't change still i changed the output.

I overlooked +ve edge triggering.

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Anyone got the answer yet?😅

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@Sambhrant Maurya

CLOCK	C1	C2(MSB to DOWN counter)	C3(LSB to UP counter)
0	${\color{Red} 0}00{\color{Blue} 0}$	0000	0000
1	${\color{Red} 0}00{\color{Blue} 1}$	0000	0001
2	${\color{Red} 0}01{\color{Blue} 0}$	0000	0001
3	${\color{Red} 0}01{\color{Blue} 1}$	..	0010
4	${\color{Red} 0}10{\color{Blue} 0}$	..	0010
5	${\color{Red} 0}10{\color{Blue} 1}$	..	0011
6	${\color{Red} 0}11{\color{Blue} 0}$	..	0011
7	${\color{Red} 0}11{\color{Blue} 1}$	..	0100
8	${\color{Red} 1}00{\color{Blue} 0}$	1001	0100
9	${\color{Red} 1}00{\color{Blue} 1}$	1001	0101
10	${\color{Red} 0}00{\color{Blue} 0}$	1001	0101
11	${\color{Red} 0}00{\color{Blue} 1}$	..	0110
12	${\color{Red} 0}01{\color{Blue} 0}$	..	0110
13	${\color{Red} 0}01{\color{Blue} 1}$	..	0111
14	${\color{Red} 0}10{\color{Blue} 0}$	1001	0111
15	${\color{Red} 0}10{\color{Blue} 1}$	1001	1000
16	${\color{Red} 0}11{\color{Blue} 0}$	1001	1000
17	${\color{Red} 0}11{\color{Blue} 1}$	1001	1001

 

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@MiNiPanda

thank you !

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@MiNiPanda At clock 9 why dint you change counter 2 and counter 3 since both msb and lsb bit is 1?

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I didn't get it pls anyone can explain

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@Piyush #### Counter C2 will get activated when the MSB of C1 goes from 0$\rightarrow$1, as there is positive edge trigerring. Notice that at clocks 8 and 9 it is staying at 1.

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@MiNiPanda C2 is a down counter so at clock 8 c2 should be 1111 and not 1001. I think this question should be skipped because it will take too much time to calculate where both c2 and c3 will be equal.