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Recent questions tagged sequential-circuit
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GO Classes Test Series 2023 | Digital Logic | Test 3 | Question: 20
Consider the following circuit :If $A n, B n$ denote the next state corresponding to current states $A, B$ respectively, thenFor this circuit, which of the following is/a...
GO Classes
1.2k
views
asked
Jun 2, 2022
Digital Logic
goclasses2024-dl-3-weekly-quiz
goclasses
digital-logic
sequential-circuit
flip-flop
multiple-selects
two-marks
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4
4 votes
1
1 answer
625
625 views
GO Classes Test Series 2023 | Digital Logic | Test 3 | Question: 21
Consider the sequential circuit shown in the figure, where both flip-flops “$\text{FD A}$” and “$\text{FD B}$” used are positive edge-triggered $D$ flip-flops. The state ...
GO Classes
625
views
asked
Jun 2, 2022
Digital Logic
goclasses2024-dl-3-weekly-quiz
goclasses
digital-logic
sequential-circuit
synchronous-asynchronous-circuits
flip-flop
digital-counter
two-marks
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3
3 votes
1
1 answer
584
584 views
GO Classes Test Series 2023 | Digital Logic | Test 3 | Question: 22
Consider the sequential circuit shown in the figure, where both flip-flops “$\text{FD A}$” and “$\text{FD B}$” used are positive edge-triggered $D$ flip-flops. The state ...
GO Classes
584
views
asked
Jun 2, 2022
Digital Logic
goclasses2024-dl-3-weekly-quiz
goclasses
digital-logic
sequential-circuit
synchronous-asynchronous-circuits
flip-flop
digital-counter
two-marks
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4
4 votes
1
1 answer
488
488 views
GO Classes Test Series 2023 | Digital Logic | Test 3 | Question: 23
Consider the following circuit.What are the values of $P, Q, R$ after two cycles if $P=0, Q=1$ and $R=0$ to begin with?$011$$101$$100$$111$
GO Classes
488
views
asked
Jun 2, 2022
Digital Logic
goclasses2024-dl-3-weekly-quiz
goclasses
digital-logic
sequential-circuit
synchronous-asynchronous-circuits
flip-flop
digital-counter
two-marks
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4
4 votes
1
1 answer
817
817 views
GO Classes Test Series 2023 | Digital Logic | Test 3 | Question: 25
Consider the following circuit.$10011000010$ is supplied to the "data" terminal in $11$ clock cycles. After that the values of $q_2 q_1 q_0$ are$000$$010$$101$$111$
GO Classes
817
views
asked
Jun 2, 2022
Digital Logic
goclasses2024-dl-3-weekly-quiz
goclasses
digital-logic
sequential-circuit
synchronous-asynchronous-circuits
flip-flop
digital-counter
two-marks
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1
1 vote
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663
663 views
NIELIT 2022 April Scientist B | Section B | Question: 94
Consider a combination of $\text{T}$ and $\text{D}$ flip-flops connected as shown below. The output of the $\text{D}$ flipflop is connected to the input of the $\text{T}$...
soujanyareddy13
663
views
asked
Apr 12, 2022
Digital Logic
nielit2022apr-scientistb
digital-circuits
flip-flop
sequential-circuit
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30
30 votes
6
answers
6 answers
15.4k
15.4k views
GATE CSE 2021 | Set 1 | Question: 28
Consider a $3$-bit counter, designed using $T$ flip-flops, as shown below:Assuming the initial state of the counter given by $\text{PQR}$ as $000$, what are the next thre...
Arjun
15.4k
views
asked
Feb 18, 2021
Digital Logic
gatecse-2021-set1
digital-logic
sequential-circuit
digital-counter
two-marks
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2
2 votes
1
1 answer
888
888 views
NIELIT Scientific Assistant A 2020 November: 85
Which flip-flop is used to make all types of shift registers?JK flip-flopD flip-flopT flip-flopAll the options
gatecse
888
views
asked
Dec 9, 2020
Digital Logic
nielit-sta-2020
digital-logic
sequential-circuit
flip-flop
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1 vote
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4 answers
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1.7k views
NIELIT 2017 OCT Scientific Assistant A (IT) - Section D: 10
A $4$ bit ripple counter and a $4$ bit synchronous counter are made using flip-flops having a propagation delay of $10$ ns each. If the worst case delay in the ripple cou...
admin
1.7k
views
asked
Aug 28, 2020
Digital Logic
nielit2017oct-assistanta-it
digital-logic
sequential-circuit
flip-flop
digital-counter
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0 votes
3
3 answers
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3.0k views
NIELIT 2017 OCT Scientific Assistant A (CS) - Section D: 9
A sequential circuit using D flip-flop and logic gates is shown in Figure, where $X$ and $Y$ are the inputs and $Z$ is the output. The circuit is$\text{S-R}$ Flip-flop wi...
admin
3.0k
views
asked
Aug 28, 2020
Digital Logic
nielit2017oct-assistanta-cs
digital-logic
sequential-circuit
flip-flop
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1 vote
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2 answers
1.6k
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NIELIT 2017 OCT Scientific Assistant A (CS) - Section D: 10
A $4$ bit ripple counter and a $4$ bit synchronous counter are made using flip-flops having a propagation delay of $10$ ns each. If the worst case delay in the ripple cou...
admin
1.6k
views
asked
Aug 28, 2020
Digital Logic
nielit2017oct-assistanta-cs
digital-logic
sequential-circuit
flip-flop
digital-counter
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2
2 votes
1
1 answer
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NIELIT 2016 MAR Scientist C - Section C: 37
A sequential circuit outputs a $\text{ONE}$ when an even number$(>0)$ of one’s are input; otherwise the output is $\text{ZERO}.$ The minimum number of states required is$...
admin
1.6k
views
asked
Apr 2, 2020
Digital Logic
nielit2016mar-scientistc
digital-logic
sequential-circuit
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2 votes
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NIELIT 2016 MAR Scientist C - Section C: 39
If a clock with time period $“T”$ is used with $n$ stage shift register, then output of final stage will be delayed by$nT$ sec$(n-1)T$ sec$n/T$ sec$(2n-1)T$ sec
admin
1.8k
views
asked
Apr 2, 2020
Digital Logic
nielit2016mar-scientistc
digital-logic
sequential-circuit
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0
0 votes
0
0 answers
722
722 views
NIELIT 2017 OCT Scientific Assistant A (IT) - Section B: 19
In a ripple counter using edge-triggered $JK$ flip-flops, the pulse input is applied toClock input of all flip-flops$J$ and $K$ input of one flip-flop$J$ and $K$ input of...
admin
722
views
asked
Apr 1, 2020
Digital Logic
nielit2017oct-assistanta-it
digital-logic
sequential-circuit
flip-flop
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2 votes
4
answers
4 answers
3.2k
3.2k views
NIELIT 2017 OCT Scientific Assistant A (IT) - Section B: 33
The number of columns in a state table for a sequential circuit with $’m’$ flip flops and $’n’$ input is$m+n$$m+2n$$2m+n$$2m+2n$
admin
3.2k
views
asked
Apr 1, 2020
Digital Logic
nielit2017oct-assistanta-it
digital-logic
sequential-circuit
flip-flop
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1
1 vote
2
2 answers
1.2k
1.2k views
NIELIT 2017 OCT Scientific Assistant A (CS) - Section C: 8
In a ripple counter using edge-triggered $JK$ flip-flops, the pulse input is applied toClock input of all flip-flops$J$ and $K$ input of one flip-flop$J$ and $K$ input of...
admin
1.2k
views
asked
Apr 1, 2020
Digital Logic
nielit2017oct-assistanta-cs
digital-logic
sequential-circuit
flip-flop
+
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3
3 votes
2
2 answers
1.8k
1.8k views
NIELIT 2016 MAR Scientist B - Section C: 3
The output of a sequential circuit depends on present inputs onlypast inputs onlyboth present and past inputspresent outputs only
admin
1.8k
views
asked
Mar 31, 2020
Digital Logic
nielit2016mar-scientistb
digital-logic
sequential-circuit
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3
3 votes
1
1 answer
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3.3k views
NIELIT 2016 MAR Scientist B - Section C: 4
In a ripple counter using edge triggered $JK$ flip-flops, the pulse input is applied to theclock input of all flip-flopsclock input of one flip-flop$J$ and $K$ inputs of ...
admin
3.3k
views
asked
Mar 31, 2020
Digital Logic
nielit2016mar-scientistb
digital-logic
sequential-circuit
flip-flop
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3
3 votes
2
2 answers
3.5k
3.5k views
NIELIT 2016 DEC Scientist B (IT) - Section B: 35
What will be the final output of D flip-Flop if the input string is $0010011100$?$1$$0$Don’t CareNone of the above
admin
3.5k
views
asked
Mar 31, 2020
Digital Logic
nielit2016dec-scientistb-it
digital-logic
sequential-circuit
flip-flop
+
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2
2 votes
1
1 answer
1.2k
1.2k views
NIELIT 2016 DEC Scientist B (CS) - Section B: 35
What will be the final output of D Flip-Flop, if the input string is $11010011$?$1$$0$Don’t CareNone of the above
admin
1.2k
views
asked
Mar 31, 2020
Digital Logic
nielit2016dec-scientistb-cs
digital-logic
sequential-circuit
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0
0 votes
1
1 answer
1.3k
1.3k views
UGC NET CSE | December 2004 | Part 2 | Question: 9
Essential hazards may occur in :Combinational logic circuitsSynchronous sequential logic circuitsAsynchronous sequential logic circuits working in the fundamental modeAsy...
go_editor
1.3k
views
asked
Mar 26, 2020
Digital Logic
ugcnetcse-dec2004-paper2
digital-circuits
sequential-circuit
hazards
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9
9 votes
1
1 answer
5.4k
5.4k views
ISRO CSE 2020 | Question: 80
A new flipflop with inputs $X$ and $Y$, has the following property$$\begin{array}{|c|c|c|}\hline \bf{X}& \bf{Y}& \bf{Current\ state}&\bf{ Next\ state} \\\hline 0&0&Q&...
Satbir
5.4k
views
asked
Jan 13, 2020
Digital Logic
isro-2020
digital-logic
sequential-circuit
flip-flop
normal
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0
0 votes
0
0 answers
932
932 views
Morris Mano Edition 3 Exercise 9 Question 24 (Page No. 396)
The boolean functions for the input of SR latch are as follows. Obtain the circuit diagram using a minimum number of NAND gates.$S = x _1’x _2’x _3 + x _1x _2x _3$.$R = x...
ajaysoni1924
932
views
asked
Apr 8, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
synchronous-asynchronous-circuits
min-no-gates
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3
3 votes
0
0 answers
988
988 views
Morris Mano Edition 3 Exercise 9 Question 23 (Page No. 396)
Draw the logic diagram of the product of sum expression$ Y = (x _1 + x _2’)(x _2 + x _3)$Show that there is a static 0 hazard when $x _1$ and $x _3$ is equal to zero and...
ajaysoni1924
988
views
asked
Apr 8, 2019
Digital Logic
digital-logic
morris-mano
sequential-circuit
synchronous-asynchronous-circuits
hazards
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