0 0 votes @Arjun sir In the Question :- https://gateoverflow.in/1391/gate2005-68 I have drawn like :- F D E M W F D D E M W F - D E M W Total 8 Clock cycle with operand forwarding. Why cant we Overlap stuffs means:- In first case at second instruction the data will be available only after the memory access of first instruction.We could do something like in the Upper edge of the clock fetch from the memory and in the downward edge of clock Do the execution operation of next stage. If we follow this policy we will get 7 clock cycles. Checkout the comment of Arjun Sir:- https://gateoverflow.in/3623/gate2006-it-79 Or when to use such technique as depicted by Arjun Sir. CO & Architecture pipelining co-and-architecture + – Na462 515 views answer comment Share Follow Print 0 reply Please log in or register to add a comment.
0 0 votes serial no. cycle 1 cycle 2 cycle 3 cycle 4 cycle 5 cycle 6 cycle 7 cycle 8 cycle 9 I1 IF RD EX MA WB I2 IF --------- RD EX MA WB I3 IF -------- RD EX MA WB USING THE DATA FORWARDING Rackson answered Oct 11, 2018 Rackson comment Share Follow 0 reply Please log in or register to add a comment.