Recent questions tagged instruction-format

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A stack organized computer has which of the following instructions?zero-addressone-addresstwo-addressthree-address
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Which of the following is/are not features of RISC processor?Large number of addressing modes.Uniform instruction set.(i) Only(ii) OnlyBoth (i) and (ii)None of the option...
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Which of the following is false?Interrupts which are initiated by an instruction are software interruptsWhen a subroutine is called, the address of the instruction follow...
66 66 votes
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A processor has $64$ registers and uses $16$-bit instruction format. It has two types of instructions: I-type and R-type. Each I-type instruction contains an opcode, a re...
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One instruction tries to write an operand before it is written by previous instruction. This may lead to a dependency calledTrue dependencyAnti-dependencyOutput dependenc...
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Instructions related to accessing I/O devices are typically privileged instructions, that is, they can be executed in kernel mode but not in user mode. Give a reason why ...
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Consider a hypothetical CPU which supports 2 address, 1 address and 0 address instructions. A 16 bit instruction is placed in 128 word memory. If there exists 2 two addre...
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In a 16-bit instruction format, the size of the address field is 7 bits. The computer uses an expanding opcode technique. It has 2, two address instructions and 250 one a...
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Certain CPU uses expanding op-code . It has 16 bit instructions with 6-bit addresses . It has maximum 192 one-address Instructions.Then number of 2-addresses instructions...
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A processor has $128$ distinct instructions. A $24-$bit instruction word has an opcode, register, and operand.The number of bits available for the operand field is $7.$Th...
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How are 2 memory access required here? Only R3 contains a memory address which will be accessed for the operand.
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A computer uses a memory unit with 256K words of 32 bits each. A binary instruction code is stored in one word of memory. The instruction has four parts: an indirect bit,...
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Consider the following program segment used to execute on a hypothetical processor. Consider all the registers are of 16 bit sizeI1 MOV CX,0005 ; CX ← 0005I2 MOV BX,OFF7H...
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A computer has 256 K word memory. The instruction format has 4 fields i.e., Opcode, register field to represent one of the 60 processor registers, mode field represent on...
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Consider a computer has 64 registers and support 15 different instructions. Each instruction has 4 fields i.e. opcode, source register, destination register and immediate...
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A system has 16 bits instruction that support zero address, one addressand two address instructions Assume each address field size is 5 bits itis designed for supporting ...
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A data driven machine is one that executes an instruction if the needed data is available. The physical ordering of the code listing does not dictate the course of execut...
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A byte addressable computer has a memory capacity of $2$$^{m}$$KB$ ($k$ bytes) and can perform $2$$^{n}$ operations. An instruction involving $3$ operands and one operato...
106 106 votes
8 answers 8 answers
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A processor has $16$ integer registers $\text{(R0, R1}, \ldots ,\text{ R15)}$ and $64$ floating point registers $\text{(F0, F1}, \ldots , \text{F63)}.$ It uses a $2\text{...
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1 1 vote
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In a 16-bit computer instruction format, the size of the address field is 5 bits. The computer uses an expanding opcode technique. It has 2 two-address instructions and 1...
4 4 votes
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A hypothetical processor supports two-address, one-address and zero-address instructions. It has a 256 word memory and each instruction is 19 bits long. If there are 4 tw...
2 2 votes
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computer uses addressing modes to reduce the number of bits in the addressing field of the instructionCan someone please explain how this statement is true? PLEASEExample...
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I am watching IIT Madras lecture of Addressing mode, in that Prof take an example, in which we have a register r0 = 1000Link:- https://www.youtube.com/watch?v=p9wxyIx-j-c...
14 14 votes
5 answers 5 answers
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Consider the hypothetical processor is supports both 2 address and one address instructions.It has 128 word memory A 16-bit instruction is placed in the one memory word.Q...
2 2 votes
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Self reallocating code required for displacement addressing mode.How ?Please someone explain this concept.
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1 answers 1 answer
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Consider a hypothetical processor that supports two address, one address and zero address instructions. It has a $256$ word memory, and a $20$ bit instruction is placed i...
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1 answers 1 answer
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A computer has $170$ different operations. Memory is word addressable where word size is $4$ bytes and each instruction requires one word. All instructions have two addre...