Recent questions tagged pipelining

Pipe line consists of 5 stages , add instruction takes 2 cycles in EX stage, mul instruction takes 3 cycles in EX stage .. If we don't use buffer in between stages(no sto...

Consider the following instruction sequence:$$\begin{aligned}&\text{I}_1: \text{R}_1=100\\&\text{I}_2: \text{R}_1=\text{R}_2+\text{R}_4\\&\text{I}_3: \text{R}_2=\text{R}_...

In a pipelined architecture Static branch prediction is used with branch taken assumption. Assume that 30% of the instructions executed for a program are branch instructi...

Recall that in go-back-$N$ protocol, the transmitting window size is $N$ and the receiver window size is $1.$ Consider a pipelined, reliable transport protocol that uses ...

Consider a $5$-stage instruction pipeline. The stages and the corresponding stage delays are given below. InstructionStage delayFetch instruction (FI)3 nsDecode instruct...

In a pipeline the maximum ideal speed-up is 5. Let the percentage of unconditional branches in a set of typical program be 5% and that of conditional branches be 10%. If ...

if an unpipelined processor with a cycle time of 25 ns is evenly divided into 5 pipeline stages using pipeline latches with 1-ns latency,what is the total latency of the ...