Recent questions tagged virtual-memory / GATE Overflow for GATE CSE

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151

Virtual Memory
Say i have a Cache with hit ratio 96% and access time 1ns and a memory with access time 10 ns Now by default we go for Sequential access instead of Parallel Now... Tavg = 0.96*(1) + 0.4*(1+10) this will be the answer rt? My doubt is For ... one to apply?? Like used in Question:- https://gateoverflow.in/788/gate2003-78 they have used First one instead of Second.Please help me out??

Say i have a Cache with hit ratio 96% and access time 1ns and a memory with access time 10 ns Now by default we go for Sequential access instead of ParallelNow... Tavg =...

Na462

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Na462 asked Apr 4, 2018

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0 answers

152

Virtual Memory
I have some doubt please listen me out an point where I am wrong if i am wrong.. Let's say I have a physically addressed cache, a TLB and 2 level page table memory.(page table present in memory) Cpu generated a Logical address then firstly by the ... in main memory we will access main memory directly not cache here right? Or will it check in cache first for the presence of page?

I have some doubt please listen me out an point where I am wrong if i am wrong..Let's say I have a physically addressed cache, a TLB and 2 level page table memory.(page ...

Na462

718 views

Na462 asked Apr 3, 2018

2 votes

1 answer

153

DMRC AM-IT, Virtual memory
The lookup page table shown below is for a job in a paged virtual storage system with a page size of 1024 locations. Each virtual address is in the form [p,d] where p is page number and d is displacement in the page. Virtual page Actual page 0 3 1 --- 2 4 3 0 A virtual address of [0,514] maps to an actual address of A) 512 B)1538 C)3586 D)4514

The lookup page table shown below is for a job in a paged virtual storage system with a page size of 1024 locations. Each virtual address is in the form [p,d] where p is ...

Lalit Verma

2.6k views

Lalit Verma asked Mar 31, 2018

0 votes

5 answers

154

Testbook Test Series: Operating System - Virtual Memory

nish kim

1.1k views

nish kim asked Feb 14, 2018

22 votes

3 answers

155

GATE CSE 2018 | Question: 10
Consider a process executing on an operating system that uses demand paging. The average time for a memory access in the system is $M$ units if the corresponding memory page is available in memory, and $D$ units if the memory access causes a page fault. It has been experimentally measured that the average ... $(X-M) / D-M)$ $(D-X) / D-M)$ $(X-M) / D-X)$

Consider a process executing on an operating system that uses demand paging. The average time for a memory access in the system is $M$ units if the corresponding memory p...

gatecse

10.5k views

gatecse asked Feb 14, 2018

3 votes

0 answers

156

Texas Tech University Final Exam question
The Operating System on a hypothetical computer provides its users with a virtual memory space of 232 bytes. But the computer has only 64 megabytes (226 bytes) of physical memory. This virtual memory is implemented using paging with a page size of 1024 (210) bytes. (10%) To what page number does virtual address 0x12345678 refer?

The Operating System on a hypothetical computer provides its users with a virtual memory space of 232 bytes. But the computer has only 64 megabytes (226 bytes) of physica...

Balaji Jegan

551 views

Balaji Jegan asked Jan 28, 2018

3 votes

1 answer

157

MadeEasy Test Series 2018: Operating System - VIrtual Memory
Consider a system implements 4 KB pages and 24 bits physical address space. Each page table entry contains a valid bits, a dirty bits, 2 permission bits and translation. If the maximum page table size of process is 30 KB. Then the size of virtual ... + 12 = 25 bits. Total virtual space = $2^{25}$ bytes = 32 MB Anything wrong in this ????

Consider a system implements 4 KB pages and 24 bits physical address space. Each page table entry contains a valid bits, a dirty bits, 2 permission bits and translation. ...

Rishabh Gupta 2

2.6k views

Rishabh Gupta 2 asked Jan 25, 2018

3 votes

2 answers

158

VirtualGate2018-I-64
Suppose a $32 K 8 K$ matrix A with $1$-byte elements is stored in row major order in virtual memory. Assume that only the program in question occupies space in physical memory. Program $1$ for (i = 0; i < 32768; i++) for (j = 0; j < 8192; j++) A[i ... faults would program $2$ experience if the physical memory can store only $1$ page? $(A) 8M$ $(B) 16M$ $(C) 32M$ $(D) 64M$

Suppose a $32 K×8 K$ matrix A with $1$-byte elements is stored in row major order in virtual memory. Assume that only the program in question occupies space in physical ...

Avdhesh Singh Rana

1.1k views

Avdhesh Singh Rana asked Jan 23, 2018

4 votes

1 answer

159

VM size
Consider a page size of 1 KB and that each page table entry takes 4 B. If every page table fits into a single page and 3 level paging are used then size of virtual memory is ________(in bits).

Consider a page size of 1 KB and that each page table entry takes 4 B. If every page table fits into a single page and 3 level paging are used then size of virtual memory...

Tuhin Dutta

671 views

Tuhin Dutta asked Jan 18, 2018

2 votes

2 answers

160

MadeEasy Test Series 2018: Operating System - VIrtual Memory
Consider the following statements: S1 : User level process cannot modify its own page table entries. S2 : Demand paging requires that the programmer to take specific action to force the operating system to load a particular virtual memory page. ... S1 and S2 D.) None of the above My answer is A but the answer given is D please explain

Consider the following statements:S1 : User level process cannot modify its own page table entries.S2 : Demand paging requires that the programmer to take specific action...

ashish pal

1.3k views

ashish pal asked Jan 17, 2018

4 votes

1 answer

161

MadeEasy Test Series 2018: Operating System - VIrtual Memory
Consider a system implements 4 KB pages and 24 bits physical address space. Each page table entry contains a valid bits, a dirty bits, 2 permission bits and translation. If the maximum page table size of process is 30 KB. Then the size of virtual memory supported by the system is ________ (MB).

Consider a system implements 4 KB pages and 24 bits physical address space. Each page table entry contains a valid bits, a dirty bits, 2 permission bits and translation. ...

yankur9

706 views

yankur9 asked Jan 13, 2018

2 votes

2 answers

162

Memory Management
Please Explain.

Please Explain.

Shubham Kumar Gupta

834 views

Shubham Kumar Gupta asked Jan 8, 2018

1 votes

0 answers

163

VIRTUAL MEMORY
Computer has 16 active applications, each with a 32 bit address space(4GB). What does system actually have? A) two 2GB memory module B) four 4GB memory module C) eight 8GB memory module D) one 16GB memory module

Computer has 16 active applications, each with a 32 bit address space(4GB).What does system actually have?A) two 2GB memory moduleB) four 4GB memory moduleC) eight 8GB me...

srestha

552 views

srestha asked Dec 22, 2017

3 votes

1 answer

164

gatebook-os
Consider a virtual memory system running on a RISC CPU. Page tables are not locked in memory and may be swapped to disk. An 1w (load word) instruction reads one data word from memory; the address is the sum of value in a register and an immediate constant ... In the worst case how many page faults could be generated as a result of the fetch, decode, and execution of an 1w instruction?

Consider a virtual memory system running on a RISC CPU. Page tables are not locked in memory and may be swapped to disk. An 1w (load word) instruction reads one data word...

rishi71662data4

2.3k views

rishi71662data4 asked Dec 21, 2017

0 votes

2 answers

165

MadeEasy Test Series: Operating System - Virtual Memory
A computer system implements a 36 bit virtual address. Page size of 4 KB and the size of physical memory is 30 bits. The approximate size of page table in the system is ________ MB. I got 36 but given answer is 48.Which is correct?

A computer system implements a 36 bit virtual address. Page size of 4 KB and the size of physical memory is 30 bits. The approximate size of page table in the system is _...

rahul sharma 5

1.3k views

rahul sharma 5 asked Dec 18, 2017

1 votes

1 answer

166

MadeEasy Test Series: Operating System - Virtual Memory
Consider a machine 32 MB physical memory and 32 bit virtual address space. If the page size is 8 KB, what is the approximate size of the page table in MB? It was in numerical type and i filled .75 as the answer,but given answer is 1. What should be the correct answer?

Consider a machine 32 MB physical memory and 32 bit virtual address space. If the page size is 8 KB, what is the approximate size of the page table in MB?It was in numeri...

rahul sharma 5

1.2k views

rahul sharma 5 asked Dec 18, 2017

0 votes

1 answer

167

MadeEasy Test Series: Operating System - Virtual Memory
Certain computer with paged virtual memory has 4KB pages, a 32 bit byte addressable virtual address space and 30 bit byte addressable physical address space. The system manages an inverted page table. Where each entry includes page ... plus 12 overhead bits. What is size of basic inverted page table including page number and overhead bits is?

Certain computer with paged virtual memory has 4KB pages, a 32 bit byte addressable virtual address space and 30 bit byte addressable physical address space. The system m...

aaru14

2.4k views

aaru14 asked Dec 10, 2017

1 votes

0 answers

168

OS:- Paging
Does inverted page table takes less memory to store a processes as compared to single/multilevel paging?Please explain reason also

Does inverted page table takes less memory to store a processes as compared to single/multilevel paging?Please explain reason also

rahul sharma 5

588 views

rahul sharma 5 asked Dec 6, 2017

1 votes

2 answers

169

paging

Parshu gate

836 views

Parshu gate asked Dec 5, 2017

3 votes

1 answer

170

TLB buffer
My doubt is Sorry if its silly. 1. TLB Maps from VA --> PA, so when its accessed ? is it when cpu generates logical address and by hardware it get convert into virtual address and then tlb is looked to convert into physical address. 2. When a ... Virtual address space to physical address space i.e. TLB Stores frequent mapping of pages. So where is actually TLB Stored is it in cache?

My doubt is Sorry if its silly.1. TLB Maps from VA PA, so when its accessed ? is it when cpu generates logical address and by hardware it get convert into virtual addre...

Na462

1.0k views

Na462 asked Nov 26, 2017

1 votes

0 answers

171

TAT Paging
Let Memory access time=20ns Disk Access time is=10ms No TLB is used. Page size=4KB and PTES=64 bytes. Assume that the processes are referenced such that each of its page is referenced only once. However the order of reference is not known. For a process of size 10MB, compute TAT using 2 level and 3 level Paging.

Let Memory access time=20nsDisk Access time is=10msNo TLB is used.Page size=4KB and PTES=64 bytes.Assume that the processes are referenced such that each of its page is r...

Vasu_gate2017

362 views

Vasu_gate2017 asked Nov 23, 2017

3 votes

1 answer

172

TLB tag bits

atul_21

1.9k views

atul_21 asked Nov 21, 2017

2 votes

2 answers

173

Suppose that cache access time is 7 ns, main memory access time is 50 ns and disk space access time is 1200 ns.

Suppose that cache access time is 7 ns, main memory access time is 50 ns and disk space access time is 1200 ns. If the hit rate of cache is 60% and of main memory hier...

Rohit Gupta 8

1.3k views

Rohit Gupta 8 asked Nov 18, 2017

–1 votes

1 answer

174

Virtual memory question
TLB lookup time ($t_h$) = 20 ns TLB hit ratio ($h_t$) = 99% Memory access time ($t_s$) = 100ns Page fault rate ($h_p$) = 0.05% Swap page time (in or out) ($t_p$) = 5000,000 ns What is the effective access time (EAT) if we assume that all pages currently in main memory are dirty? 1. 5118.91 ns 2. 51.21 ns 3. 5120.9 ns 4. None of the above.

TLB lookup time ($t_h$) = 20 nsTLB hit ratio ($h_t$) = 99%Memory access time ($t_s$) = 100nsPage fault rate ($h_p$) = 0.05%Swap page time (in or out) ($t_p$) = 5000,000 n...

Hemant Parihar

1.5k views

Hemant Parihar asked Nov 16, 2017

1 votes

1 answer

175

MadeEasy Subject Test: Operating System - Virtual Memory

rahul sharma 5

626 views

rahul sharma 5 asked Nov 4, 2017

4 votes

2 answers

176

Virtual Memory

Shivam Chauhan

1.1k views

Shivam Chauhan asked Oct 25, 2017

4 votes

1 answer

177

Virtual Memory

Shivam Chauhan

939 views

Shivam Chauhan asked Oct 25, 2017

1 votes

2 answers

178

#GATE #PAGING OS
Consider a paged virtual memory system with 32-bit virtual address and 1KB pages. Each PTE requires 32 bits. It is desired to limit the page table size to one page. how many levels of page tables are required? Tables at two of the levels have 2^8 entries ... has 2^6 entries how many pages are possible? If the bottom level page table has 2^6 entries how many pages are possible?

Consider a paged virtual memory system with 32-bit virtual address and 1KB pages. Each PTE requires 32 bits. It is desired to limit the page table size to one page. how ...

sameeksha tiwari

1.1k views

sameeksha tiwari asked Sep 26, 2017

0 votes

1 answer

179

UGC NET CSE | December 2008 | Part 2 | Question: 42
If the executing program size is greater than the existing $RAM$ of a computer, it is still possible to execute the program if the $OS$ supports : multitasking virtual memory paging system none of the above

If the executing program size is greater than the existing $RAM$ of a computer, it is still possible to execute the program if the $OS$ supports :multitasking ...

rishu_darkshadow

2.3k views

rishu_darkshadow asked Sep 26, 2017

0 votes

1 answer

180

I have a basic query regarding paging can any solve it?
Without the TLB, in the paging every data/instruction access requires two memory accesses One for the page table and one for the data / instruction . Can any one explain it with diagram (if possible)?

Without the TLB, in the paging every data/instruction access requires two memory accessesOne for the page table and one for the data / instruction .Can any one explain it...

hem chandra joshi

389 views

hem chandra joshi asked Sep 24, 2017

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