Recent questions tagged virtual-memory

Match the pairs in the following questionPair - 1A. Virtual MemoryB. Shared MemoryC. Look-ahead bufferD. Look-aside bufferPair - 2P. Temporal localityQ. Spatial localityR...

In a paged virtual memory organization with 32 bit virtual address and 1 KB page size PTE is 32 bits. The number of levels of paging required to limit the outer page tab...

Consider a 32-bit virtual address is used for paging with page size of 1024 bytes. Two-level paging is implemented with equal number of entries in every page table of the...

A computer system implements $8\;\text{kilobyte}$ pages and a $32\text{-bit}$ physical address space. Each page table entry contains a valid bit, a dirty bit, three permi...

Consider a system with byte-addressable memory, $32\text{-bit}$ logical addresses, $4\;\text{kilobyte}$ page size and page table entries of $4\;\text{bytes}$ each. The si...

A computer system implements a $40\;\text{-bit}$ virtual address, page size of $8\;\text{kilobytes}$, and a $128\text{-entry}$ translation look-aside buffer $\text{(TLB)}...

In a virtual memory system, size of the virtual address is $32$-bit, size of the physical address is $30$-bit, page size is $4$ Kbyte and size of each page table entry is...

The address sequence generated by tracing a particular program executing in a pure demand paging system with $100$ bytes per page is$\text{0100, 0200, 0430, 0499, 0510, 0...

Match the following flag bits used in the context of virtual memory management on the left side with the different purposes on the right side of the table below.$$\small ...

A paging scheme uses a Translation Look-aside Buffer (TLB). A TLB-access takes $10$ ns and the main memory access takes $50$ ns. What is the effective access time(in ns) ...

A demand paged virtual memory system uses $16$ bit virtual address, page size of $256$ bytes, and has $1$ Kbyte of main memory. $\text{LRU}$ page replacement is implement...

In a virtual memory system the address space specified by the address lines of the CPU must be _____ than the physical memory size and ____ than the secondary storage siz...

In a paged segmented scheme of memory management, the segment table itself must have a page table becauseThe segment table is often too large to fit in one pageEach segme...

Which one of the following statements is true?Macro definitions cannot appear within other macro definitions in assembly language programsOverlaying is used to run a prog...

Let the page fault service time be $10$ milliseconds(ms) in a computer with average memory access time being $20$ nanoseconds (ns). If one page fault is generated every $...

Consider a paging hardware with a $TLB$. Assume that the entire page table and all the pages are in the physical memory. It takes $10$ milliseconds to search the $TLB$ an...

A computer system supports $32$-bit virtual addresses as well as $32$-bit physical addresses. Since the virtual address space is of the same size as the physical address ...

A CPU generates $32$-bit virtual addresses. The page size is $4$ KB. The processor has a translation look-aside buffer (TLB) which can hold a total of $128$ page table en...

If an instruction takes $i$ microseconds and a page fault takes an additional $j$ microseconds, the effective instruction time if on the average a page fault occurs every...

A certain computer system has the segmented paging architecture for virtual memory. The memory is byte addressable. Both virtual and physical address spaces contain $2^{1...

Which of the following is/are advantage(s) of virtual memory?Faster access to memory on an average.Processes can be given protected address spaces.Linker can assign addre...

A multi-user, multi-processing operating system cannot be implemented on hardware that does not supportAddress translationDMA for disk transferAt least two modes of CPU e...

Listed below are some operating system abstractions (in the left column) and the hardware components (in the right column)$$\small \begin{array}{|cl|cl|}\hline \text{(A)}...