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Recent questions tagged co-and-architecture

1 votes
0 answers
1564
Random
If asked to count the number of RAW dependencies, do we consider only adjacent instructions or both adjacent and non-adjacent? Please explain in detail.
If asked to count the number of RAW dependencies, do we consider only adjacent instructions or both adjacent and non-adjacent? Please explain in detail.
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0 votes
1 answer
1570
UGC NET CSE | December 2008 | Part 2 | Question: 39
Which of the following are Assembler Directives? (i) EQU (ii) ORIGIN (iii) START (iv) END (ii), (iii) and (iv) (i), (iii) and (iv) (iii) and (iv) (i), (ii), (iii) and (iv)
Which of the following are Assembler Directives?(i) EQU (ii) ORIGIN (iii) START (iv) END(ii), (iii) and (iv) (i), (iii) and (iv) (iii) and (iv) ...
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12 votes
2 answers
1574
self doubt computer organization
The most relevant addressing mode to write position-independent code what is the meaning of postion - independent code
The most relevant addressing mode to write position-independent code what is the meaning of postion - independent code
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1 votes
1 answer
1576
UGC NET CSE | June 2009 | Part 2 | Question: 33
In which addressing mode the operand is given explicitly in the instruction itself ? Absolute mode Immediate mode Indirect mode Index mode
In which addressing mode the operand is given explicitly in the instruction itself ?Absolute mode Immediate mode Indirect mode Index mode
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0 votes
0 answers
1578
can any one give a better lookup on following terms in CO
1. Physically Index Physically accessed Cache 2. Physically Index Virtually accessed Cache 3. Virtually Index Physically accessed Cache 4. Virtually Index Virtually accessed Cache
1. Physically Index Physically accessed Cache2. Physically Index Virtually accessed Cache3. Virtually Index Physically accessed Cache4. Virtually Index Virtually accessed...
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0 votes
1 answer
1579
CISC [Interview Question]
CISC is related to: 1. Hardware 2. Software 3. Firmware 4. None of the above
CISC is related to:1. Hardware2. Software3. Firmware4. None of the above
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2 votes
1 answer
1580
HALT instruction
During the execution of halt instruction, what is the value stored in the program counter? Please explain.
During the execution of halt instruction, what is the value stored in the program counter?Please explain.
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0 votes
1 answer
1583
Computer organization ,self doubt
X= (a+b)*(c+d) variables are in the memory execute on a register -register cpu Then how many 2 address and 3 address instructions requare .. Explain please
X= (a+b)*(c+d) variables are in the memory execute on a register -register cpuThen how many 2 address and 3 address instructions requare .. Explain please
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3 votes
1 answer
1589
cache memory
In k-way set associative mapping , the tag field contains 8 bits and 64 no. of sets and propagation delay of a comparator is k/20 nsec and propagation delay of 2*1 multiplexer is k/10 nsec. then what will be the total delay? (let k=8)
In k-way set associative mapping , the tag field contains 8 bits and 64 no. of sets and propagation delay of a comparator is k/20 nsec and propagation delay of 2*1 multip...
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4 votes
4 answers
1590
cache memory
when 8-way set associative mapping of cache memory is done and main memory size is 32 GB and Tag field has 10 bits. what will be the cache size ( consider, memory is byte addresable )
when 8-way set associative mapping of cache memory is done and main memory size is 32 GB and Tag field has 10 bits. what will be the cache size ( consider, memory is byt...
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