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Boolean algebra. Combinational and sequential circuits. Minimization. Number representations and computer arithmetic (fixed and floating point)

$$\scriptsize{\overset{{\large{\textbf{Mark Distribution in Previous GATE}}}}{\begin{array}{|c|c|c|c|c|c|c|c|}\hline
\textbf{Year}& \textbf{2024-1} & \textbf{2024-2}  & \textbf{2023}& \textbf{2022} & \textbf{2021-1}&\textbf{2021-2}&\textbf{Minimum}&\textbf{Average}&\textbf{Maximum}
\\\hline\textbf{1 Mark Count} & 2&2&2&1&2&3&1&2&3
\\\hline\textbf{2 Marks Count} & 2&2&2&2&2&2&2&2&2
\\\hline\textbf{Total Marks} & 6&6&6&5&6&7&\bf{5}&\bf{6}&\bf{7}\\\hline
\end{array}}}$$

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Previous GATE Questions in Digital Logic

#81
5.6k
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2 answers
22 votes
GATE CSE 1987 | Question: 1-vii
The exponent of a floating-point number is represented in excess-$\text{N}$ code so that:The dynamic range is large.The precision is high.The smallest number is represent...
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#82
4.7k
views
3 answers
16 votes
GATE CSE 1987 | Question: 1-IV
The output $F$ of the below multiplexer circuit can be represented by$AB+B\bar{C}+\bar{C}A+\bar{B}\bar{C}$$A\oplus B\oplus C$$A \oplus B$$\bar{A} \bar{B} C+ \bar{A} B \ba...
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#83
5.1k
views
1 answers
7 votes
GATE CSE 1987 | Question: 1-III
The above circuit produces the output sequence:$1111\quad 1111\quad0000\quad0000$$1111 \quad 0000\quad1111\quad0000$$1111 \quad 0001\quad0011\quad0101$$1010\quad1010\quad...
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#84
5.4k
views
5 answers
26 votes
GATE CSE 1987 | Question: 1-II
The total number of Boolean functions which can be realised with four variables is:$4$$17$$256$$65, 536$
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#85
7.7k
views
2 answers
26 votes
GATE CSE 2011 | Question: 51
Consider the following circuit involving three D-type flip-flops used in a certain type of counter configuration.If all the flip-flops were reset to $0$ at power on, what...
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#86
9.6k
views
7 answers
25 votes
GATE CSE 2016 Set 1 | Question: 30
Consider the two cascade $2$ to $1$ multiplexers as shown in the figure . The minimal sum of products form of the output $X$ is $\overline{P} \ \overline {Q}+PQR$$\ove...
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#87
31.4k
views
9 answers
85 votes
GATE CSE 2016 Set 1 | Question: 33
Consider a carry look ahead adder for adding two $n$-bit integers, built using gates of fan-in at most two. The time to perform addition using this adder is$\Theta (1)$$\...
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#88
52.8k
views
20 answers
114 votes
GATE CSE 2016 Set 1 | Question: 8
We want to design a synchronous counter that counts the sequence $0-1-0-2-0-3$ and then repeats. The minimum number of $\text{J-K}$ flip-flops required to implement this ...
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#89
12.5k
views
9 answers
35 votes
GATE CSE 2016 Set 1 | Question: 07
The $16\text{-bit}\;2's$ complement representation of an integer is $1111 \quad 1111 \quad 1111 \quad 0101;$ its decimal representation is ____________
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#90
7.4k
views
1 answers
32 votes
GATE CSE 2016 Set 1 | Question: 06
Consider the Boolean operator # with the following properties :$x \# 0 = x, x \# 1=\overline{x}, x \# x = 0$ and $x \# \overline{x} = 1.$ Then $x\#y$ is equivalent to $x\...
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#91
19.7k
views
7 answers
69 votes
GATE CSE 2016 Set 2 | Question: 07
Consider an eight-bit ripple-carry adder for computing the sum of $A$ and $B$, where $A$ and $B$ are integers represented in $2$'s complement form. If the decimal value o...
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#92
12.5k
views
4 answers
34 votes
GATE CSE 2016 Set 2 | Question: 09
Let $X$ be the number of distinct $16$-bit integers in $2's$ complement representation. Let $Y$ be the number of distinct $16$-bit integers in sign magnitude representati...
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#93
13.9k
views
10 answers
55 votes
GATE CSE 2016 Set 2 | Question: 08
Let, $x_{1} ⊕ x_{2} ⊕ x_{3} ⊕ x_{4}= 0$ where $x_{1}, x_{2}, x_{3}, x_{4}$ are Boolean variables, and $⊕$ is the XOR operator.Which one of the following must alwa...
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#94
16.5k
views
6 answers
60 votes
GATE CSE 2003 | Question: 47
Consider the following circuit composed of XOR gates and non-inverting buffers.The non-inverting buffers have delays $\delta_1 = 2 ns$ and $\delta_2 = 4 ns$ as shown in t...
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#95
801
views
0 answers
5 votes
GATE CSE 1991 | Question: 6,b
Design a $1024$ bit serial-in/serial-out unidirectional shift register using a $1K\times 1 $bit RAM with a data input $D_{in}$, data output $D_{out}$ and control input $...
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#96
23.8k
views
5 answers
54 votes
GATE CSE 1991 | Question: 5-c
Find the maximum clock frequency at which the counter in the figure below can be operated. Assume that the propagation delay through each flip flop and each AND gate is $...
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#97
3.4k
views
2 answers
20 votes
GATE CSE 1991 | Question: 5-b
Find the minimum sum of products form of the logic function $ f(A,B,C,D) = \Sigma_{m}(0,2,8,10,15)+ \Sigma _{d}(3,11,12,14)$ where $m$ and $d$ represent minterm and don't...
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#98
3.2k
views
1 answers
16 votes
GATE CSE 1997 | Question: 72
Following floating point number format is given$f$ is a fraction represented by a $6-bit$ mantissa (includes sign bit) in sign magnitude form, $e$ is a $4-bit$ exponent (...
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#99
3.3k
views
1 answers
21 votes
GATE CSE 1997 | Question: 71
Let $f=(\bar{w} + y)(\bar{x} +y)(w+\bar{x}+z)(\bar{w}+z)(\bar{x}+z)$Express $f$ as the minimal sum of products. Write only the answer.If the output line is stuck at $0$, ...
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#100
12.9k
views
9 answers
33 votes
GATE CSE 1993 | Question: 6-3
For the initial state of $000$, the function performed by the arrangement of the $\text{J-K}$ flip-flops in figure is:Shift Register$\text{Mod- 3}$ Counter$\text{Mod- 6}$...
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